From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47D8AC77B73 for ; Wed, 31 May 2023 08:56:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234739AbjEaI4D (ORCPT ); Wed, 31 May 2023 04:56:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235135AbjEaIz6 (ORCPT ); Wed, 31 May 2023 04:55:58 -0400 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E646113 for ; Wed, 31 May 2023 01:55:57 -0700 (PDT) Received: by mail-ej1-x62a.google.com with SMTP id a640c23a62f3a-96fe2a1db26so938756666b.0 for ; Wed, 31 May 2023 01:55:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1685523355; x=1688115355; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=6am1AiEAOxoY0UZIv4ELH1CWM+kxqYxNYLZvqz76ssg=; b=KJ9VJqUN4y/AWCB+TmVu/7+Wcfsbf2PMdAZ/EBxXIg0k7ZLBL47iPhc7dlWofUUUZt gRMN8SVOUmjSZPxZDPU02r1Ycf9HDxx+eaJx7pvMQWpOm/hkRlBeB8bbpq+iXRQ17zP5 H7OVnccJr4h3PbPplpp9hO4Vi0y/dZ63HTgaaGcuLuOHK0hUoPjrYzLum0W57SmhO6KU o/7luo/H/ErlXIBrnY8cHEpv6p1ueEZ+X+e0ykJufWac7Et3nSM5dwkFDwVUWLnPcFcJ J6nADJ6tW5lw7NNaBRjxQmxqamOilRdkMZnOTYub2bQS+dFv+UMs32TKbgHY/3zcnHcj txlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685523355; x=1688115355; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=6am1AiEAOxoY0UZIv4ELH1CWM+kxqYxNYLZvqz76ssg=; b=kCSdd71SBh0+nE+QeCEel6tUN3Jx7JZcy7jpSaZ23TOHvXgtSwIV2BCuy2SjX50loT 2CPLOe/LnfAVrB4ZM11IRdwVmRIrQ3x4yBk1AyChEqdsq3XwA31sSd9Gemkn0qDyIa9Z bOAZkZl4hv7K2z9K1kV/5stbmvQmOJHxUPwlsAU7CQ2qWuMp2580zKGyEq7Uxk8ntOhy QiiOIeO+08Yn1bk1Zc4cmYSPN77u4ADkuoQI3QmATNNoRIZbdUQ7ljPEDttBo2zuo3iD 38NShN3aBd4REXtKCBDEquYxsE5JRWMJFkigI/Z3Qu0RHpPeRRYI+YgrlqMt0V3nQFuT wQnw== X-Gm-Message-State: AC+VfDyZrx3PmJruAdnELfLD0zHwchZHw5frV2fklAaq8a1dc6yjKz1f YTfUoc3ww2AMZlr9BwJF6L0RbQ== X-Google-Smtp-Source: ACHHUZ7bt0BD77gr6LG3aEUlXExVX18Lo4MW6pqODLIuWHO4GmhfSjRNckCop3Gvd4nZktxjemKicQ== X-Received: by 2002:a17:907:97c3:b0:974:b15:fcda with SMTP id js3-20020a17090797c300b009740b15fcdamr5145556ejc.54.1685523353731; Wed, 31 May 2023 01:55:53 -0700 (PDT) Received: from [192.168.1.20] ([178.197.199.204]) by smtp.gmail.com with ESMTPSA id b16-20020a170906151000b0096b15e4ffcesm8577273ejd.85.2023.05.31.01.55.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 31 May 2023 01:55:53 -0700 (PDT) Message-ID: <46eced08-5bf6-3e4b-7a91-ff4d16c7dab9@linaro.org> Date: Wed, 31 May 2023 10:55:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v3 1/3] dt-bindings: timer: atmel,at91sam9260-pit: convert to yaml Content-Language: en-US To: Claudiu Beznea , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, daniel.lezcano@linaro.org, tglx@linutronix.de, wim@linux-watchdog.org, linux@roeck-us.net Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org References: <20230530090758.1652329-1-claudiu.beznea@microchip.com> <20230530090758.1652329-2-claudiu.beznea@microchip.com> From: Krzysztof Kozlowski In-Reply-To: <20230530090758.1652329-2-claudiu.beznea@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/05/2023 11:07, Claudiu Beznea wrote: > Convert Microchip AT91 PIT bindings to YAML. Along with it clocks and > clock-names bindings were added as the drivers needs it to ensure proper > hardware functionality. > > Signed-off-by: Claudiu Beznea > --- > .../devicetree/bindings/arm/atmel-sysregs.txt | 12 --- > .../bindings/timer/atmel,at91sam9260-pit.yaml | 99 +++++++++++++++++++ > 2 files changed, 99 insertions(+), 12 deletions(-) > create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml > > diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt > index 67a66bf74895..54d3f586403e 100644 > --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt > +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt > @@ -4,18 +4,6 @@ Chipid required properties: > - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid" > - reg : Should contain registers location and length > > -PIT Timer required properties: > -- compatible: Should be "atmel,at91sam9260-pit" > -- reg: Should contain registers location and length > -- interrupts: Should contain interrupt for the PIT which is the IRQ line > - shared across all System Controller members. > - > -PIT64B Timer required properties: > -- compatible: Should be "microchip,sam9x60-pit64b" > -- reg: Should contain registers location and length > -- interrupts: Should contain interrupt for PIT64B timer > -- clocks: Should contain the available clock sources for PIT64B timer. > - > System Timer (ST) required properties: > - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" > - reg: Should contain registers location and length > diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml > new file mode 100644 > index 000000000000..d0f3f80db4cb > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml > @@ -0,0 +1,99 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip AT91 Periodic Interval Timer (PIT) > + > +maintainers: > + - Claudiu Beznea > + > +description: > + Microchip AT91 periodic interval timer provides the operating system scheduler > + interrupt. It is designed to offer maximum accuracy and efficient management, > + even for systems with long response time. > + > +properties: > + compatible: > + oneOf: > + - items: > + - const: microchip,sama7g5-pit64b >From where do you have this compatible? Wasn't in old binding and commit msg does not explain it. > + - const: microchip,sam9x60-pit64b > + - items: > + enum: These are not items. Just enum.. Does it even work? > + - atmel,at91sam9260-pit > + - microchip,sam9x60-pit64b > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: atmel,at91sam9260-pit > + then: > + properties: > + interrupts: > + description: > + Shared interrupt between all system controller members (power management > + controller, watchdog, PIT, reset controller, real-time timer, real-time > + clock, memory controller, debug unit, system timer). > + clocks: > + maxItems: 1 > + > + else: > + properties: > + clocks: > + minItems: 2 > + clock-names: > + items: > + - const: pclk > + - const: gclk interrupts? They are still required, so why no description here? > + required: > + - clock-names > + > +unevaluatedProperties: false additionalProperties:false instead > + Best regards, Krzysztof