From: Arnd Bergmann <arnd@arndb.de>
To: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Cc: bhelgaas@google.com, michals@xilinx.com,
lorenzo.pieralisi@arm.com, paul.burton@imgtec.com,
yinghai@kernel.org, wangyijing@huawei.com, robh@kernel.org,
russell.joyce@york.ac.uk, sorenb@xilinx.com,
jiang.liu@linux.intel.com, pawel.moll@arm.com,
mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
galak@codeaurora.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
Bharat Kumar Gogada <bharatku@xilinx.com>,
Ravi Kiran Gummaluri <rgummal@xilinx.com>
Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze
Date: Tue, 12 Jan 2016 23:27:25 +0100 [thread overview]
Message-ID: <4734542.KZZp0TeeeM@wuerfel> (raw)
In-Reply-To: <1452620173-4905-4-git-send-email-bharatku@xilinx.com>
On Tuesday 12 January 2016 23:06:11 Bharat Kumar Gogada wrote:
> Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both
> Zynq and Microblaze Architectures.
> With these modifications drivers/pci/host/pcie-xilinx.c, will
> work on both Zynq and Microblaze Architectures.
>
> Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
I think this patch should be split into three, as you are doing three
unrelated things here.
> ---
> Changes:
> Changed Total number of MSI IRQ count logic according to both architectures.
> Updated MSI assigning functions accordingly to new count.
> Modified irq_domain_add_linear with new MSI IRQ count.
> Added #ifdef to pci_fixup_irqs which is ARM specific API.
> ---
> drivers/pci/host/pcie-xilinx.c | 22 +++++++++++++++++-----
> 1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
> index 3e3757f..1981948 100644
> --- a/drivers/pci/host/pcie-xilinx.c
> +++ b/drivers/pci/host/pcie-xilinx.c
> @@ -92,7 +92,12 @@
> #define ECAM_DEV_NUM_SHIFT 12
>
> /* Number of MSI IRQs */
> -#define XILINX_NUM_MSI_IRQS 128
> +#define XILINX_NUM_MSI_IRQS 128
> +#ifdef CONFIG_ARM
> +#define TOT_NR_IRQS XILINX_NUM_MSI_IRQS
> +#else
> +#define TOT_NR_IRQS (NR_IRQS + XILINX_NUM_MSI_IRQS)
> +#endif
Something looks wrong here in the microblaze variant. What does NR_IRQS
have to do with it?
> @@ -238,15 +243,20 @@ static void xilinx_pcie_destroy_msi(unsigned int irq)
> */
> static int xilinx_pcie_assign_msi(struct xilinx_pcie_port *port)
> {
> + int irq;
> int pos;
>
> pos = find_first_zero_bit(msi_irq_in_use, XILINX_NUM_MSI_IRQS);
> - if (pos < XILINX_NUM_MSI_IRQS)
> + irq = pos;
> +#ifdef CONFIG_MICROBLAZE
> + irq = XILINX_NUM_MSI_IRQS + pos;
> +#endif
if (IS_ENABLED(CONFIG_MICROBLAZE))
irq = XILINX_NUM_MSI_IRQS + pos;
> @@ -705,7 +715,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
> #endif
> pci_scan_child_bus(bus);
> pci_assign_unassigned_bus_resources(bus);
> +#ifdef CONFIG_ARM
> pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
> +#endif
> pci_bus_add_devices(bus);
> platform_set_drvdata(pdev, port);
Here it looks like microblaze gets it right. I'm not sure why we still
need the pci_fixup_irqs() on ARM, but my feeling is that this should be
fixed in common code.
Arnd
next prev parent reply other threads:[~2016-01-12 22:27 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-12 17:36 [PATCH V2 0/5] PCIe Xilinx generic driver for Microblaze and Bharat Kumar Gogada
[not found] ` <1452620173-4905-1-git-send-email-bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2016-01-12 17:36 ` [PATCH V2 1/5] PCI: xilinx: Removing xilinx_pcie_parse_and_add_res function Bharat Kumar Gogada
2016-01-12 17:36 ` [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Bharat Kumar Gogada
2016-02-03 15:40 ` Bharat Kumar Gogada
2016-02-03 15:59 ` Bjorn Helgaas
2016-02-03 16:08 ` Bharat Kumar Gogada
[not found] ` <1452620173-4905-6-git-send-email-bharatku-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2016-02-03 16:32 ` Bjorn Helgaas
2016-02-03 16:38 ` Bjorn Helgaas
2016-02-04 5:49 ` Bharat Kumar Gogada
2016-02-04 14:51 ` Bjorn Helgaas
2016-02-04 14:56 ` Bharat Kumar Gogada
2016-01-12 17:36 ` [PATCH V2 2/5] PCI: xilinx: Removing struct hw_irq structure Bharat Kumar Gogada
2016-01-12 22:23 ` Arnd Bergmann
2016-01-27 14:27 ` Bharat Kumar Gogada
2016-01-12 17:36 ` [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Bharat Kumar Gogada
2016-01-12 22:27 ` Arnd Bergmann [this message]
2016-01-26 9:59 ` Michal Simek
2016-01-26 12:11 ` Arnd Bergmann
2016-01-26 15:21 ` Michal Simek
2016-01-27 14:41 ` Bharat Kumar Gogada
2016-01-27 14:33 ` Bharat Kumar Gogada
2016-01-27 15:14 ` Arnd Bergmann
2016-01-28 13:20 ` Bharat Kumar Gogada
2016-01-28 13:49 ` Arnd Bergmann
2016-01-28 14:18 ` Bharat Kumar Gogada
2016-01-28 14:23 ` Arnd Bergmann
2016-01-28 14:49 ` Lorenzo Pieralisi
2016-01-12 17:36 ` [PATCH V2 4/5] PCI: xilinx: Updating Zynq PCI binding documentation with Microblaze node Bharat Kumar Gogada
2016-01-15 2:33 ` Rob Herring
2016-01-12 22:29 ` [PATCH V2 0/5] PCIe Xilinx generic driver for Microblaze and Arnd Bergmann
2016-01-27 14:35 ` Bharat Kumar Gogada
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4734542.KZZp0TeeeM@wuerfel \
--to=arnd@arndb.de \
--cc=bharat.kumar.gogada@xilinx.com \
--cc=bharatku@xilinx.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=ijc+devicetree@hellion.org.uk \
--cc=jiang.liu@linux.intel.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mark.rutland@arm.com \
--cc=michals@xilinx.com \
--cc=paul.burton@imgtec.com \
--cc=pawel.moll@arm.com \
--cc=rgummal@xilinx.com \
--cc=robh@kernel.org \
--cc=russell.joyce@york.ac.uk \
--cc=sorenb@xilinx.com \
--cc=wangyijing@huawei.com \
--cc=yinghai@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox