From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6DD21FA3748 for ; Tue, 1 Nov 2022 09:10:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229954AbiKAJKz (ORCPT ); Tue, 1 Nov 2022 05:10:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229926AbiKAJKy (ORCPT ); Tue, 1 Nov 2022 05:10:54 -0400 Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9770260F9 for ; Tue, 1 Nov 2022 02:10:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1667293852; x=1698829852; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MS65hzRcowwFFHtC3I8qoC5hB75cprJ75+vZI/SxZE8=; b=XaieyVPe8ExCK7LBwbf+qYyckMzT06ypz23JX11OpTeT5cxUetjOBAPM 8zjcvs6JjBDjBnPBmv4956AO57JH6ncjiqYd0lJb9YdEhBIAM+BzUQ9wd nX9eiPSVayB7ZT8D5EeSrIldEEbgzcR6Xxwn+v8Mas2cwhBRTC4o31B5E pyn60dE/Ek0iTpld9MEAwKptgMjRmwy/7V5KUlkZQx1DYuy+b83WIPSBm A9nSzHxiP6NlDVU8z8oebPsgjCNS05kmQZz+GhR9Di9exWEzjPCYZ5j3q EjAPnnik4JBMgqGNhL8JlhyzFuRcFpRu5HWCzILxZ6mTf/nhMzS+FIPRB w==; X-IronPort-AV: E=Sophos;i="5.95,230,1661810400"; d="scan'208";a="27083556" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 01 Nov 2022 10:10:51 +0100 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Tue, 01 Nov 2022 10:10:51 +0100 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Tue, 01 Nov 2022 10:10:51 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1667293851; x=1698829851; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MS65hzRcowwFFHtC3I8qoC5hB75cprJ75+vZI/SxZE8=; b=BA1/7Q5gEE8W/EKTuad8XtZgBZRpC/AN31Fjg2a4wdrfezLojHhgT5Jr IBeH+bQmJKUDk2DHQJHPqZ3BMybV9XpGzuO/eviRQfixPj3a+pcYKHEen Kt4W/xgbg6MNpQW3Xb1s8Y+VvaCiot0UhpuzHvhehhA82YuN3bA/5Snhs r3dz7vJ5lU56l3gAHO3pPx4jcxTl9vdnJWWg6uOyD2fvllp5R9ZwS60sP EG/FDLw8jZryXtdoRflmYDbcNdnCfeqFrYHW4xGMteTH9ifH4fktST6YW 59v+jdSc7FR7eb3XRF2D4GQI8D6R3V9HDuNnw6unmYtA9qYkDo0LNlxLp Q==; X-IronPort-AV: E=Sophos;i="5.95,230,1661810400"; d="scan'208";a="27083555" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 01 Nov 2022 10:10:50 +0100 Received: from steina-w.localnet (unknown [10.123.53.21]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 6A7D4280056; Tue, 1 Nov 2022 10:10:50 +0100 (CET) From: Alexander Stein To: Shawn Guo Cc: Rob Herring , Krzysztof Kozlowski , Sascha Hauer , Fabio Estevam , Catalin Marinas , Will Deacon , Pengutronix Kernel Team , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 1/2] arm64: dts: tqma8mpql: add PCIe support Date: Tue, 01 Nov 2022 10:10:50 +0100 Message-ID: <4754286.GXAFRqVoOG@steina-w> Organization: TQ-Systems GmbH In-Reply-To: <20221029035422.GL125525@dragon> References: <20221018085330.2540222-1-alexander.stein@ew.tq-group.com> <20221029035422.GL125525@dragon> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Shawn, thanks for your feedback. Am Samstag, 29. Oktober 2022, 05:54:22 CET schrieb Shawn Guo: > On Tue, Oct 18, 2022 at 10:53:29AM +0200, Alexander Stein wrote: > > Add PCIe support on TQMa8MPxL module on MBa8MPxL mainboard. > > > > Signed-off-by: Alexander Stein > > --- > > This is based on next-20221018 where imp8mp PCIe support has been > > merged. > > > > .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 42 ++++++++++++++++++- > > 1 file changed, 41 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts > > b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts index > > 7bf6f81e87b4..7a32379cd006 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts > > @@ -8,6 +8,7 @@ > > > > #include > > #include > > > > +#include > > > > #include > > #include "imx8mp-tqma8mpql.dtsi" > > > > @@ -48,6 +49,12 @@ backlight_lvds: backlight { > > > > status = "disabled"; > > > > }; > > > > + clk_xtal25: clk-xtal25 { > > + compatible = "fixed-clock"; > > + #clock-cells = <0>; > > + clock-frequency = <25000000>; > > + }; > > + > > > > gpio-keys { > > > > compatible = "gpio-keys"; > > pinctrl-names = "default"; > > > > @@ -340,9 +347,16 @@ &gpio4 { > > > > "", "", "", "", > > "", "", "", "", > > "", "", "DP_IRQ", "DSI_EN", > > > > - "HDMI_OC#", "TEMP_EVENT#", "PCIE_CLK_OE#", "", > > + "HDMI_OC#", "TEMP_EVENT#", "PCIE_REFCLK_OE#", "", > > > > "", "", "", "FAN_PWR", > > "RTC_EVENT#", "CODEC_RST#", "", ""; > > > > + > > + pcie_refclkreq-hog { > > Hyphen is more recommended than underscore for node name. Ah, yes. Will fix that. Thanks for spotting. > > + gpio-hog; > > + gpios = <22 0>; > > + output-high; > > + line-name = "PCIE_REFCLK_OE#"; > > + }; > > > > }; > > > > &gpio5 { > > > > @@ -377,6 +391,13 @@ at24c02_54: eeprom@54 { > > > > pagesize = <16>; > > vcc-supply = <®_vcc_3v3>; > > > > }; > > > > + > > + pcieclk: clk@6a { > > Should be clock-controller@6a? I will actually go with clock-generator@6a as shown in the bindings example. The vendor actually names it a clock generator. Thanks Alexander > Shawn > > > + compatible = "renesas,9fgv0241"; > > + reg = <0x6a>; > > + clocks = <&clk_xtal25>; > > + #clock-cells = <1>; > > + }; > > > > }; > > > > &i2c4 { > > > > @@ -407,6 +428,25 @@ &pcf85063 { > > > > interrupts = <28 IRQ_TYPE_EDGE_FALLING>; > > > > }; > > > > +&pcie_phy { > > + fsl,clkreq-unsupported; > > + fsl,refclk-pad-mode = ; > > + clocks = <&pcieclk 0>; > > + clock-names = "ref"; > > + status = "okay"; > > +}; > > + > > +&pcie { > > + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, > > + <&clk IMX8MP_CLK_HSIO_AXI>, > > + <&clk IMX8MP_CLK_PCIE_ROOT>; > > + clock-names = "pcie", "pcie_bus", "pcie_aux"; > > + assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>; > > + assigned-clock-rates = <10000000>; > > + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>; > > + status = "okay"; > > +}; > > + > > > > &pwm2 { > > > > pinctrl-names = "default"; > > pinctrl-0 = <&pinctrl_pwm2>;