[PATCH 0/2] Add Qualcomm Adreno 642L speedbin and update SC7280 OPPs

[PATCH 0/2] Add Qualcomm Adreno 642L speedbin and update SC7280 OPPs

[Danila Tikhonov]

This patch series adds support for the A642L GPU speedbin (0x81) to the
Adreno driver and updates the device tree for the SC7280 platform to
include this new speedbin. The A642L is used in the Qualcomm Snapdragon
SM7325 SoCs family, which is identical to the SC7280, just as the SM7125 is
identical to the SC7180. Therefore, the SM7325 will use the SC7280 device
tree. Patches for the SM7325 will be sent later, but in the meantime, you
can find them at the following link:
https://github.com/mainlining/linux/commits/danila/spacewar-upstream

To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Rob Clark <robdclark@gmail.com>
To: Sean Paul <sean@poorly.run>
To: Abhinav Kumar <quic_abhinavk@quicinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Marijn Suijten <marijn.suijten@somainline.org>
To: David Airlie <airlied@gmail.com>
To: Daniel Vetter <daniel@ffwll.ch>
To: Eugene Lepshy <fekz115@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: freedreno@lists.freedesktop.org
Cc: cros-qcom-dts-watchers@chromium.org
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>

Eugene Lepshy (2):
  drivers: drm/msm/a6xx_catalog: Add A642L speedbin (0x81)
  arm64: dts: qcom: sc7280: Add 0x81 Adreno speed bin

 arch/arm64/boot/dts/qcom/sc7280.dtsi      | 8 ++++----
 drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
 2 files changed, 5 insertions(+), 4 deletions(-)

-- 
2.45.2

[PATCH 1/2] drivers: drm/msm/a6xx_catalog: Add A642L speedbin (0x81)

[Danila Tikhonov]

From: Eugene Lepshy <fekz115@gmail.com>

According to downstream, A642L's speedbin is 129 and uses 4 as index

Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
---
 drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
index 68ba9aed5506e..99f0ee1a2edea 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
@@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = {
 		.speedbins = ADRENO_SPEEDBINS(
 			{ 0,   0 },
 			{ 117, 0 },
+			{ 129, 4 },
 			{ 172, 2 }, /* Called speedbin 1 downstream, but let's not break things! */
 			{ 190, 1 },
 		),
-- 
2.45.2

Re: [PATCH 1/2] drivers: drm/msm/a6xx_catalog: Add A642L speedbin (0x81)

[Konrad Dybcio]

On 22.07.2024 8:43 PM, Danila Tikhonov wrote:
> From: Eugene Lepshy <fekz115@gmail.com>
> 
> According to downstream, A642L's speedbin is 129 and uses 4 as index
> 
> Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

Re: [PATCH 1/2] drivers: drm/msm/a6xx_catalog: Add A642L speedbin (0x81)

[Bjorn Andersson]

On Mon, Jul 22, 2024 at 09:43:13PM GMT, Danila Tikhonov wrote:
> From: Eugene Lepshy <fekz115@gmail.com>
> 

Please make sure the subject prefix matches other changes in the same
driver/files.

Regards,
Bjorn

> According to downstream, A642L's speedbin is 129 and uses 4 as index
> 
> Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
> ---
>  drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> index 68ba9aed5506e..99f0ee1a2edea 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c
> @@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = {
>  		.speedbins = ADRENO_SPEEDBINS(
>  			{ 0,   0 },
>  			{ 117, 0 },
> +			{ 129, 4 },
>  			{ 172, 2 }, /* Called speedbin 1 downstream, but let's not break things! */
>  			{ 190, 1 },
>  		),
> -- 
> 2.45.2
> 

Re: [PATCH 1/2] drivers: drm/msm/a6xx_catalog: Add A642L speedbin (0x81)

[Danila Tikhonov]

On 7/29/24 06:09, Bjorn Andersson wrote:
> On Mon, Jul 22, 2024 at 09:43:13PM GMT, Danila Tikhonov wrote:
>> From: Eugene Lepshy <fekz115@gmail.com>
>>
> Please make sure the subject prefix matches other changes in the same
> driver/files.
>
> Regards,
> Bjorn
>

Thanks for the advice

"drm/msm/a6xx: --//--" will be better?

Best wishes,
Danila

[PATCH 2/2] arm64: dts: qcom: sc7280: Add 0x81 Adreno speed bin

[Danila Tikhonov]

From: Eugene Lepshy <fekz115@gmail.com>

A642L (speedbin 0x81) uses index 4, so this commit
sets the fourth bit for A642L supported opps.

Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 3d8410683402f..91cc5e74d8f5a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2834,14 +2834,14 @@ opp-315000000 {
 					opp-hz = /bits/ 64 <315000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 					opp-peak-kBps = <1804000>;
-					opp-supported-hw = <0x07>;
+					opp-supported-hw = <0x17>;
 				};
 
 				opp-450000000 {
 					opp-hz = /bits/ 64 <450000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
 					opp-peak-kBps = <4068000>;
-					opp-supported-hw = <0x07>;
+					opp-supported-hw = <0x17>;
 				};
 
 				/* Only applicable for SKUs which has 550Mhz as Fmax */
@@ -2856,14 +2856,14 @@ opp-550000000-1 {
 					opp-hz = /bits/ 64 <550000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
 					opp-peak-kBps = <6832000>;
-					opp-supported-hw = <0x06>;
+					opp-supported-hw = <0x16>;
 				};
 
 				opp-608000000 {
 					opp-hz = /bits/ 64 <608000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
 					opp-peak-kBps = <8368000>;
-					opp-supported-hw = <0x06>;
+					opp-supported-hw = <0x16>;
 				};
 
 				opp-700000000 {
-- 
2.45.2

Re: [PATCH 2/2] arm64: dts: qcom: sc7280: Add 0x81 Adreno speed bin

[Konrad Dybcio]

On 22.07.2024 8:43 PM, Danila Tikhonov wrote:
> From: Eugene Lepshy <fekz115@gmail.com>
> 
> A642L (speedbin 0x81) uses index 4, so this commit
> sets the fourth bit for A642L supported opps.
> 
> Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad