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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: B5ZRoJ3UhODTTqX5jdk5fxZTNtrcvOfq X-Proofpoint-GUID: B5ZRoJ3UhODTTqX5jdk5fxZTNtrcvOfq X-Authority-Analysis: v=2.4 cv=H7NOUOYi c=1 sm=1 tr=0 ts=6ad62a3e cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=rrvG0T/C2D967D07Ol03YQ==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=eOnteo6YT6IUeBgu2X4A:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE5MDA1NyBTYWx0ZWRfX5bzeCECbb1iI 8M7H/qEnna/lJtnq89qHDMgtjX/74zfcGI4pzOFONrOu1LvB9wwq2RHPazNMMJVc5AyY8p37jGc TD9g2KuqiZSzULrSxVeEdoqmq1AJjWkGtP8F6XCtYopIiw1eDc/uBzoaZClOJaRzYMDvYHv1WLg MWqNQbDLFDZG5ML2LJLPz1+xjW+EESYQFplZ/n6zlNS/R5YY4TPqSGd6yj3TiZHlR1JRgiubstH kl2f0Xsy0uyfDDZZcBgsHr+HgX0ZjuIYo/k+IqpMRxH98rRH5rwsfhPzDsUPjKT+xFRofqykHQ8 a9k1aO/vTdCXFJ3ENdbSPKJG6n6Z2L+g7KEQFrDSD0V95DkuU45rp9i6xCwCyiCZar45L6TMvlK M6pT9st5nZj2JnQL+3aYSKapaq2DSVtu9XHV859Yn5Vdn5WvGs0Q/eGGDjE0l8uw4n+Kif1FOaf n6s8SdSvwtun41vp4cA== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE5MDA1NyBTYWx0ZWRfX5hClYwNXzGtr AjtQ6i0/IDJUudEoy2ImqoFxL0N0bIgV1p0M7sWrIRd8h9r+FOvHA42SwMC9EcEP/KRhb9+Sef8 h+x7ns4wfj1KJbTHiQ3IvaFKdFz4jLk= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-19_04,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 bulkscore=0 adultscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610190057 Hi, On 19-Oct-26 3:41 PM, Dmitry Baryshkov wrote: > GPU DVFS on SDM660 never changed the GFX3D rate. clk_gfx3d_determine_rate() > builds the parent request by hand and leaves best_parent_rate at zero, so > the PLL is asked to determine a rate for a zero parent rate and the new > rate is dropped on the floor. > > Use clk_hw_forward_rate_request(), which fills in the parent's limits and > rate the way the core expects them. > > Fixes: af1e62f2ffe2 ("clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3d") > Signed-off-by: Dmitry Baryshkov > --- > drivers/clk/qcom/clk-rcg2.c | 21 +++++++-------------- > 1 file changed, 7 insertions(+), 14 deletions(-) > > diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c > index c44c51d860e1..9e3d7e5c81e5 100644 > --- a/drivers/clk/qcom/clk-rcg2.c > +++ b/drivers/clk/qcom/clk-rcg2.c > @@ -1207,10 +1207,10 @@ EXPORT_SYMBOL_GPL(clk_pixel_ops); > static int clk_gfx3d_determine_rate(struct clk_hw *hw, > struct clk_rate_request *req) > { > - struct clk_rate_request parent_req = { .min_rate = 0, .max_rate = ULONG_MAX }; > + struct clk_rate_request parent_req; Just a random drive-by comment: You are now leaving parent_req entirely uninitialized filling it with whatever is on the stack. Where as before all values except for max_rate would be filled with 0. Are you sure this is what you want ? Maybe: struct clk_rate_request parent_req = {}; ? Regards, Hans > struct clk_rcg2_gfx3d *cgfx = to_clk_rcg2_gfx3d(hw); > struct clk_hw *xo, *p0, *p1, *p2; > - unsigned long p0_rate; > + unsigned long p0_rate, parent_rate; > u8 mux_div = cgfx->div; > int ret; > > @@ -1234,12 +1234,12 @@ static int clk_gfx3d_determine_rate(struct clk_hw *hw, > if (mux_div == 0) > mux_div = 1; > > - parent_req.rate = req->rate * mux_div; > + parent_rate = req->rate * mux_div; > > /* This has to be a fixed rate PLL */ > p0_rate = clk_hw_get_rate(p0); > > - if (parent_req.rate == p0_rate) { > + if (parent_rate == p0_rate) { > req->rate = req->best_parent_rate = p0_rate; > req->best_parent_hw = p0; > return 0; > @@ -1247,7 +1247,7 @@ static int clk_gfx3d_determine_rate(struct clk_hw *hw, > > if (req->best_parent_hw == p0) { > /* Are we going back to a previously used rate? */ > - if (clk_hw_get_rate(p2) == parent_req.rate) > + if (clk_hw_get_rate(p2) == parent_rate) > req->best_parent_hw = p2; > else > req->best_parent_hw = p1; > @@ -1257,16 +1257,9 @@ static int clk_gfx3d_determine_rate(struct clk_hw *hw, > req->best_parent_hw = p2; > } > > - clk_hw_get_rate_range(req->best_parent_hw, > - &parent_req.min_rate, &parent_req.max_rate); > + clk_hw_forward_rate_request(hw, req, req->best_parent_hw, &parent_req, > + parent_rate); > > - if (req->min_rate > parent_req.min_rate) > - parent_req.min_rate = req->min_rate; > - > - if (req->max_rate < parent_req.max_rate) > - parent_req.max_rate = req->max_rate; > - > - parent_req.best_parent_hw = req->best_parent_hw; > ret = __clk_determine_rate(req->best_parent_hw, &parent_req); > if (ret) > return ret; >