From: Matthias Brugger <matthias.bgg@gmail.com>
To: argus.lin@mediatek.com, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Chenglin Xu <chenglin.xu@mediatek.com>,
Sean Wang <sean.wang@mediatek.com>,
wsd_upstream@mediatek.com, henryc.chen@mediatek.com,
flora.fu@mediatek.com, Chen Zhong <chen.zhong@mediatek.com>,
Christophe Jaillet <christophe.jaillet@wanadoo.fr>,
"shailendra . v" <shailendra.v@samsung.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH V4 3/8] soc: mediatek: pwrap: remove has_bridge flag
Date: Wed, 2 May 2018 12:27:55 +0200 [thread overview]
Message-ID: <490d35d0-1ea9-f2be-d362-48af56437ead@gmail.com> (raw)
In-Reply-To: <20180502092112.3991-4-argus.lin@mediatek.com>
On 05/02/2018 11:21 AM, argus.lin@mediatek.com wrote:
> From: Argus Lin <argus.lin@mediatek.com>
>
> We use new flag caps to replace has_bridge.
> Legacy chips support bridge use PWRAP_CAP_BRIDGE
> to explain such capability.
>
> Signed-off-by: Argus Lin <argus.lin@mediatek.com>
> ---
Squash this one into 2/8.
Regards,
Matthias
> drivers/soc/mediatek/mtk-pmic-wrap.c | 10 +++-------
> 1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 3a25ff6e6907..911a8508f39f 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -689,7 +689,6 @@ struct pmic_wrapper_type {
> u32 int_en_all;
> u32 spi_w;
> u32 wdt_src;
> - unsigned int has_bridge:1;
> /* Flags indicating the capability for the target pwrap */
> u8 caps;
> int (*init_reg_clock)(struct pmic_wrapper *wrp);
> @@ -1306,7 +1305,7 @@ static int pwrap_init(struct pmic_wrapper *wrp)
> pwrap_writel(wrp, 1, PWRAP_INIT_DONE0);
> pwrap_writel(wrp, 1, PWRAP_INIT_DONE1);
>
> - if (wrp->master->has_bridge) {
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_BRIDGE)) {
> writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE3);
> writel(1, wrp->bridge_base + PWRAP_MT8135_BRIDGE_INIT_DONE4);
> }
> @@ -1401,7 +1400,6 @@ static const struct pmic_wrapper_type pwrap_mt2701 = {
> .int_en_all = ~(u32)(BIT(31) | BIT(2)),
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW,
> .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> - .has_bridge = 0,
> .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_mt2701_init_reg_clock,
> .init_soc_specific = pwrap_mt2701_init_soc_specific,
> @@ -1414,7 +1412,6 @@ static const struct pmic_wrapper_type pwrap_mt7622 = {
> .int_en_all = ~(u32)BIT(31),
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> - .has_bridge = 0,
> .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_common_init_reg_clock,
> .init_soc_specific = pwrap_mt7622_init_soc_specific,
> @@ -1427,7 +1424,6 @@ static const struct pmic_wrapper_type pwrap_mt8135 = {
> .int_en_all = ~(u32)(BIT(31) | BIT(1)),
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> - .has_bridge = 1,
> .caps = PWRAP_CAP_BRIDGE | PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_common_init_reg_clock,
> .init_soc_specific = pwrap_mt8135_init_soc_specific,
> @@ -1440,7 +1436,7 @@ static const struct pmic_wrapper_type pwrap_mt8173 = {
> .int_en_all = ~(u32)(BIT(31) | BIT(1)),
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> .wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD,
> - .has_bridge = 0,
> + .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_common_init_reg_clock,
> .init_soc_specific = pwrap_mt8173_init_soc_specific,
> };
> @@ -1509,7 +1505,7 @@ static int pwrap_probe(struct platform_device *pdev)
> return ret;
> }
>
> - if (wrp->master->has_bridge) {
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_BRIDGE)) {
> res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> "pwrap-bridge");
> wrp->bridge_base = devm_ioremap_resource(wrp->dev, res);
> --
> 2.12.5
>
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next prev parent reply other threads:[~2018-05-02 10:27 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-02 9:21 [PATCH V4 0/8] Pwrap: Mediatek pwrap driver for mt6797 argus.lin
2018-05-02 9:21 ` [PATCH V4 1/8] dt-bindings: pwrap: mediatek: add MT6351 PMIC support for MT6797 argus.lin
2018-05-03 2:01 ` Sean Wang
2018-05-02 9:21 ` [PATCH V4 2/8] soc: mediatek: pwrap: add caps flag for pwrap argus.lin
2018-05-02 10:27 ` Matthias Brugger
2018-05-02 9:21 ` [PATCH V4 3/8] soc: mediatek: pwrap: remove has_bridge flag argus.lin
2018-05-02 10:27 ` Matthias Brugger [this message]
2018-05-02 9:21 ` [PATCH V4 4/8] soc: mediatek: pwrap: add int1_en_all flag argus.lin
2018-05-02 10:29 ` Matthias Brugger
2018-05-02 9:21 ` [PATCH V4 5/8] soc: mediatek: pwrap: add pwrap for mt6797 SoCs argus.lin
2018-05-02 10:37 ` Matthias Brugger
2018-05-03 4:01 ` Sean Wang
2018-05-03 6:20 ` Argus Lin
2018-05-04 3:04 ` Sean Wang
2018-05-04 8:39 ` Matthias Brugger
2018-05-02 9:21 ` [PATCH V4 6/8] soc: mediatek: pwrap: fix cipher init argus.lin
2018-05-02 9:21 ` [PATCH V4 7/8] soc: mediatek: pwrap: add mt6351 for mt6797 SoCs argus.lin
2018-05-03 3:53 ` Sean Wang
2018-05-02 9:21 ` [PATCH V4 8/8] arm64: dts: mt6797: add pwrap support for mt6797 argus.lin
2018-05-03 2:22 ` Sean Wang
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