From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mitch Bradley Subject: Re: RFC: ARM Boot standard for passing device tree blob Date: Fri, 26 Mar 2010 07:43:20 -1000 Message-ID: <4BACF238.3040405@firmworks.com> References: <20100325210409.GH24984@n2100.arm.linux.org.uk> <1269610665.807.51.camel@e102109-lin.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1269610665.807.51.camel-uqmqopRKlSLZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: Catalin Marinas Cc: Russell King - ARM Linux , devicetree-discuss , Philippe Robin , David Rusling , Jeremy Kerr , Dave P Martin , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org Catalin Marinas wrote: > On Thu, 2010-03-25 at 21:04 +0000, Russell King - ARM Linux wrote: > >> On Wed, Mar 24, 2010 at 09:11:56AM -0600, Grant Likely wrote: >> >>> ===Required System State=== >>> > [...] > >>> *IRQs disabled >>> *MMU off >>> *Instruction cache either on or off >>> *Data cache turned off >>> >> Would recommend saying "Data cache(s) turned off" so that L2 cache is >> included. >> > > There are platforms where the L2 cache is turned on by the boot monitor > (secure monitor) and Linux has no control over it (I think OMAP). > What is the reason for turning off the data caches? Leaving all caches turned on and coherent with one another has always worked well for me at the interface from firmware to a booted program.