From: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
To: Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v4] ARM: at91: pit add DT support
Date: Fri, 06 Jan 2012 18:28:13 +0100 [thread overview]
Message-ID: <4F072F2D.20806@atmel.com> (raw)
In-Reply-To: <4F071799.3030200-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 01/06/2012 04:47 PM, Rob Herring :
> On 01/06/2012 10:20 AM, Nicolas Ferre wrote:
>> From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org>
>>
>> Retreive registers address and IRQ from device tree entry. Fall back
>> to built-in values if an error occurs.
>>
>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org>
>> [nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org: change error path and interrupts property handling]
>> Signed-off-by: Nicolas Ferre <nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
>> Reviewed-by: Jamie Iles <jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
>> Acked-by: Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
>> ---
>> v4: - change of_at91sam926x_pit_init() return value usage logic as
>> suggested by Rob Herring
>> - irq_of_parse_and_map() returns 0 on error: change test according to
>> Grant Likely note.
>>
>> v3: - use irq_of_parse_and_map() for handling irq numbers specified by DT.
>> Correction proposed by Jamie Iles.
>>
>> v2: - new specification of irq numbers in DT (due to modification of AIC code)
>> - new error path in of_at91sam926x_pit_init()
>> - fall back to built-in values if an error occurs
>> - use of of_property_read_u32() to get irq property
>>
>> .../devicetree/bindings/arm/atmel-at91.txt | 8 +++
>> arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++
>> arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++
>> arch/arm/mach-at91/at91sam926x_time.c | 60 ++++++++++++++++++--
>> 4 files changed, 73 insertions(+), 6 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
>> new file mode 100644
>> index 0000000..380f711
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
>> @@ -0,0 +1,8 @@
>> +Atmel AT91 device tree bindings.
>> +================================
>> +
>> +PIT Timer required properties:
>> +- compatible: Should be "atmel,at91sam9260-pit"
>> +- reg: Should contain registers location and length
>> +- interrupts: Should contain interrupt for the PIT which is the IRQ line
>> + shared across all System Controller members.
>> diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
>> index ea942b5..e10842a 100644
>> --- a/arch/arm/boot/dts/at91sam9g20.dtsi
>> +++ b/arch/arm/boot/dts/at91sam9g20.dtsi
>> @@ -57,6 +57,11 @@
>> reg = <0xfffff000 0x200>;
>> };
>>
>> + pit: timer@fffffd30 {
>> + compatible = "atmel,at91sam9260-pit";
>> + reg = <0xfffffd30 0xf>;
>> + interrupts = <1 4>;
>> + };
>>
>> pioA: gpio@fffff400 {
>> compatible = "atmel,at91rm9200-gpio";
>> diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
>> index ebc9617..28a678f 100644
>> --- a/arch/arm/boot/dts/at91sam9g45.dtsi
>> +++ b/arch/arm/boot/dts/at91sam9g45.dtsi
>> @@ -58,6 +58,12 @@
>> reg = <0xfffff000 0x200>;
>> };
>>
>> + pit: timer@fffffd30 {
>> + compatible = "atmel,at91sam9260-pit";
>> + reg = <0xfffffd30 0xf>;
>> + interrupts = <1 4>;
>> + };
>> +
>> dma: dma-controller@ffffec00 {
>> compatible = "atmel,at91sam9g45-dma";
>> reg = <0xffffec00 0x200>;
>> diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c
>> index d89ead7..802fea3 100644
>> --- a/arch/arm/mach-at91/at91sam926x_time.c
>> +++ b/arch/arm/mach-at91/at91sam926x_time.c
>> @@ -14,6 +14,9 @@
>> #include <linux/kernel.h>
>> #include <linux/clk.h>
>> #include <linux/clockchips.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/of_irq.h>
>>
>> #include <asm/mach/time.h>
>>
>> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
>> static struct irqaction at91sam926x_pit_irq = {
>> .name = "at91_tick",
>> .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
>> - .handler = at91sam926x_pit_interrupt
>> + .handler = at91sam926x_pit_interrupt,
>> + .irq = AT91_ID_SYS,
>> };
>>
>> static void at91sam926x_pit_reset(void)
>> @@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)
>> pit_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
>> }
>>
>> +#ifdef CONFIG_OF
>> +static struct of_device_id timer_ids[] = {
>> + { .compatible = "atmel,at91sam9260-pit" },
>> + { /* sentinel */ }
>> +};
>> +
>> +static int __init of_at91sam926x_pit_init(void)
>> +{
>> + struct device_node *np;
>> + int ret;
>> +
>> + np = of_find_matching_node(NULL, timer_ids);
>> + if (!np)
>> + goto err;
>> +
>> + pit_base_addr = of_iomap(np, 0);
>> + if (!pit_base_addr)
>> + goto node_err;
>> +
>> + /* Get the interrupts property */
>> + ret = irq_of_parse_and_map(np, 0);
>> + if (!ret)
>> + goto ioremap_err;
>> + at91sam926x_pit_irq.irq = ret;
>> +
>> + of_node_put(np);
>> +
>> + return 0;
>> +
>> +ioremap_err:
>> + iounmap(pit_base_addr);
>> +node_err:
>> + of_node_put(np);
>> +err:
>> + return -EINVAL;
>> +}
>> +#else
>> +static int __init of_at91sam926x_pit_init(void)
>> +{
>> + return -EINVAL;
>> +}
>> +#endif
>> +
>> /*
>> * Set up both clocksource and clockevent support.
>> */
>> @@ -177,7 +224,7 @@ static void __init at91sam926x_pit_init(void)
>> clocksource_register_hz(&pit_clk, pit_rate);
>>
>> /* Set up irq handler */
>> - setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
>> + setup_irq(at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);
>>
>> /* Set up and register clockevents */
>> pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
>> @@ -193,10 +240,11 @@ static void at91sam926x_pit_suspend(void)
>>
>> void __init at91sam926x_ioremap_pit(u32 addr)
>> {
>> - pit_base_addr = ioremap(addr, 16);
>> -
>> - if (!pit_base_addr)
>> - panic("Impossible to ioremap PIT\n");
>> + if (of_at91sam926x_pit_init() < 0) {
>> + pit_base_addr = ioremap(addr, 16);
>> + if (!pit_base_addr)
>> + panic("Impossible to ioremap PIT\n");
>> + }
>
> This is not what I meant. I meant call either at91sam926x_ioremap_pit or
> of_at91sam926x_pit_init. Don't nest the calls and keep the OF and non-OF
> init somewhat separate. The fact that you are passing in the physical
> address and then ignoring it for the OF case is what I have issue with.
I see...
I did not understand this way because I was so obsessed by the fact to
not introduce another interface to the PIT.
But it is true that as our future SoCs will only rely on DT to get PIT
data, we will not have the knowledge of its physical address: this is
speaking in favor of what you are saying -> I should keep those init
separated and called from the <soc_name>_ioremap_registers() functions.
Jean-Christophe, do you agree with this? If yes, I have already the
patch ready and will send a v5 of this one...
Bye,
--
Nicolas Ferre
next prev parent reply other threads:[~2012-01-06 17:28 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1318799895-5121-4-git-send-email-plagnioj@jcrosoft.com>
[not found] ` <1318799895-5121-4-git-send-email-plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org>
2012-01-05 13:48 ` [PATCH v2] ARM: at91: pit add DT support Nicolas Ferre
[not found] ` <1325771308-19770-1-git-send-email-nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2012-01-05 12:00 ` Jamie Iles
2012-01-05 14:50 ` Nicolas Ferre
[not found] ` <4F05B8A1.2010003-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2012-01-05 14:56 ` Jamie Iles
2012-01-05 17:25 ` [PATCH v3] " Nicolas Ferre
[not found] ` <1325784348-29481-1-git-send-email-nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2012-01-05 15:34 ` Jamie Iles
2012-01-05 16:42 ` Rob Herring
[not found] ` <4F05D2F3.40704-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-01-06 13:36 ` Nicolas Ferre
2012-01-05 18:00 ` Grant Likely
[not found] ` <20120105180028.GB22653-e0URQFbLeQY2iJbIjFUEsiwD8/FfD2ys@public.gmane.org>
2012-01-06 13:37 ` Nicolas Ferre
2012-01-06 16:20 ` [PATCH v4] " Nicolas Ferre
[not found] ` <1325866830-13259-1-git-send-email-nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org>
2012-01-06 15:47 ` Rob Herring
[not found] ` <4F071799.3030200-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-01-06 17:28 ` Nicolas Ferre [this message]
2012-01-09 17:39 ` Jean-Christophe PLAGNIOL-VILLARD
[not found] ` <20120109173917.GO2854-RQcB7r2h9QmfDR2tN2SG5Ni2O/JbrIOy@public.gmane.org>
2012-01-10 8:34 ` Nicolas Ferre
2012-02-22 14:32 ` [PATCH v5 1/2] " Nicolas Ferre
2012-02-22 14:32 ` [PATCH v5 2/2] ARM: at91/pit: add traces in case of error Nicolas Ferre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4F072F2D.20806@atmel.com \
--to=nicolas.ferre-aife0yeh4naavxtiumwx3w@public.gmane.org \
--cc=devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org \
--cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=plagnioj-sclMFOaUSTBWk0Htik3J/w@public.gmane.org \
--cc=robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).