Re: [PATCH 1/1] arm/dts: Tegra30: Add device tree support for SMMU

[Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]

On 04/13/2012 04:22 AM, Hiroshi Doyu wrote:
> From: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> 
> Add device tree support for Tegra30 IOMMU(SMMU).

> +++ b/Documentation/devicetree/bindings/arm/tegra/tegra30-smmu.txt

I personally like the documentation to be named after the full
compatible value, so nvidia,tegra30-smmu.txt.

> @@ -0,0 +1,19 @@
> +NVIDIA Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit)
> +
> +Required properties:
> +- compatible : "nvidia,tegra30-smmu"
> +- reg : Should contain MC registers location and length
> +- reg : Should contain AHB Arbitration registers and length
> +- reg : Should contain virtual address space range

This looks like 3 properties with the same name. It seems common to
write something more like:

reg : Should contain the register address and length for each fo the MC
and AHB arbitration registers.

But why does the SMMU driver expect to control the AHB arbitration
registers? They seem unrelated to the SMMU.

As I said in my previous email, I think the VA space size should be a
separate property.