From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCHv3 1/4] ARM: tegra: Add Tegra AHB driver Date: Fri, 04 May 2012 10:50:19 -0600 Message-ID: <4FA408CB.6060403@wwwdotorg.org> References: <1336061147-10245-1-git-send-email-hdoyu@nvidia.com><4FA2C785.2080703@wwwdotorg.org> <20120504.094030.1816474762821188264.hdoyu@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20120504.094030.1816474762821188264.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Hiroshi Doyu Cc: "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "balbi-l0cyMroinI0@public.gmane.org" , "arnd-r2nGTMty4D4@public.gmane.org" , "ccross-z5hGa2qSFaRBDgjK7y7TUQ@public.gmane.org" , "olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org" , "linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org" , "grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org" , "rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org" , "gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org" , "ohad-Ix1uc/W3ht7QT0dZR+AlfA@public.gmane.org" , "linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" , "linville-2XuSBdqkA4R54TAoqtyWWQ@public.gmane.org" , "myungjoo.ham-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" List-Id: devicetree@vger.kernel.org On 05/04/2012 12:40 AM, Hiroshi Doyu wrote: > From: Stephen Warren > Subject: Re: [PATCHv3 1/4] ARM: tegra: Add Tegra AHB driver > Date: Thu, 3 May 2012 19:59:33 +0200 > Message-ID: <4FA2C785.2080703-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> > >> On 05/03/2012 10:05 AM, Hiroshi DOYU wrote: >>> Tegra AHB Bus conforms to the AMBA Specification (Rev 2.0) Advanced >>> High-performance Bus (AHB) architecture. >>> >>> The AHB Arbiter controls AHB bus master arbitration. This effectively >>> forms a second level of arbitration for access to the memory >>> controller through the AHB Slave Memory device. The AHB pre-fetch >>> logic can be configured to enhance performance for devices doing >>> sequential access. Each AHB master is assigned to either the high or >>> low priority bin. Both Tegra20/30 have this AHB bus. >>> >>> Some of configuration param could be passed from DT too. >> >> This patch should add >> Documentation/devicetree/bindings/arm/tegra/tegra20-ahb.txt to describe >> the DT binding. > > From 'dts' POV, there's no difference between tegra20 and > tegra30. They just have a register range. Is > "../bindings/arm/tegra/tegra-ahb.txt" ok, instead of having both > tegra{20,30}-ahb.txt? Personally, I prefer to name files using the exact compatible value of the first SoC version that introduced the HW. This allows e.g. "tegra40-ahb.txt" to be introduced without making "tegra-ahb.txt" no longer fully general.