From: Stephen Boyd <sboyd@kernel.org>
To: Devi Priya <quic_devipriy@quicinc.com>,
agross@kernel.org, andersson@kernel.org, arnd@arndb.de,
catalin.marinas@arm.com, conor+dt@kernel.org,
devicetree@vger.kernel.org, geert+renesas@glider.be,
konrad.dybcio@linaro.org, krzysztof.kozlowski+dt@linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, mturquette@baylibre.com,
netdev@vger.kernel.org, nfraprado@collabora.com,
p.zabel@pengutronix.de, peng.fan@nxp.com, rafal@milecki.pl,
richardcochran@gmail.com, robh+dt@kernel.org, will@kernel.org
Cc: quic_devipriy@quicinc.com, quic_saahtoma@quicinc.com
Subject: Re: [PATCH V2 1/7] clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574
Date: Fri, 25 Aug 2023 13:58:48 -0700 [thread overview]
Message-ID: <4a00db79414dbc47a2b7792d849f7056.sboyd@kernel.org> (raw)
In-Reply-To: <20230825091234.32713-2-quic_devipriy@quicinc.com>
Quoting Devi Priya (2023-08-25 02:12:28)
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index e4ef645f65d1..1c2a72840cd2 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -228,6 +228,18 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
> [PLL_OFF_ALPHA_VAL] = 0x24,
> [PLL_OFF_ALPHA_VAL_U] = 0x28,
> },
> +
Why the extra newline? All other types aren't this way.
> + [CLK_ALPHA_PLL_TYPE_NSS_HUAYRA] = {
> + [PLL_OFF_L_VAL] = 0x04,
> + [PLL_OFF_ALPHA_VAL] = 0x08,
> + [PLL_OFF_TEST_CTL] = 0x0c,
> + [PLL_OFF_TEST_CTL_U] = 0x10,
> + [PLL_OFF_USER_CTL] = 0x14,
> + [PLL_OFF_CONFIG_CTL] = 0x18,
> + [PLL_OFF_CONFIG_CTL_U] = 0x1c,
> + [PLL_OFF_STATUS] = 0x20,
> + },
> +
next prev parent reply other threads:[~2023-08-25 20:59 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-25 9:12 [PATCH V2 0/7] Add NSS clock controller support for IPQ9574 Devi Priya
2023-08-25 9:12 ` [PATCH V2 1/7] clk: qcom: clk-alpha-pll: Add NSS HUAYRA ALPHA PLL support for ipq9574 Devi Priya
2023-08-25 20:58 ` Stephen Boyd [this message]
2023-08-29 3:28 ` Devi Priya
2023-08-25 9:12 ` [PATCH V2 2/7] dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX Devi Priya
2023-08-25 12:27 ` Krzysztof Kozlowski
2023-08-25 12:28 ` Krzysztof Kozlowski
2023-08-25 9:12 ` [PATCH V2 3/7] clk: qcom: gcc-ipq9574: Add gpll0_out_aux clock Devi Priya
2023-09-01 16:15 ` Kathiravan T
2023-08-25 9:12 ` [PATCH V2 4/7] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions Devi Priya
2023-08-25 10:14 ` Rob Herring
2023-08-25 12:30 ` Krzysztof Kozlowski
2023-09-13 8:28 ` Krzysztof Kozlowski
2023-08-25 9:12 ` [PATCH V2 5/7] clk: qcom: Add NSS clock Controller driver for IPQ9574 Devi Priya
2023-08-25 11:44 ` Dmitry Baryshkov
2023-09-12 14:08 ` Devi Priya
2023-09-20 6:39 ` Devi Priya
2023-09-20 8:20 ` Dmitry Baryshkov
2023-09-22 12:01 ` Devi Priya
2023-10-05 6:25 ` Devi Priya
2023-10-05 7:19 ` Dmitry Baryshkov
2023-10-05 9:56 ` Devi Priya
2023-10-06 21:21 ` Dmitry Baryshkov
2023-10-17 20:48 ` Devi Priya
2023-08-28 12:35 ` Konrad Dybcio
2023-08-29 3:42 ` Devi Priya
2023-08-25 9:12 ` [PATCH V2 6/7] arm64: dts: qcom: ipq9574: Add support for nsscc node Devi Priya
2023-08-25 11:28 ` Dmitry Baryshkov
2023-09-13 3:32 ` Devi Priya
2023-09-13 8:23 ` Geert Uytterhoeven
2023-09-13 8:26 ` Krzysztof Kozlowski
2023-09-13 8:38 ` Geert Uytterhoeven
2023-09-13 8:43 ` Konrad Dybcio
2023-09-13 8:55 ` Krzysztof Kozlowski
2023-08-25 9:12 ` [PATCH V2 7/7] arm64: defconfig: Build NSS Clock Controller driver for IPQ9574 Devi Priya
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