devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Arnd Bergmann" <arnd@arndb.de>
To: "Peter Chen" <peter.chen@cixtech.com>,
	"Rob Herring" <robh@kernel.org>,
	krzk+dt@kernel.org, "Conor Dooley" <conor+dt@kernel.org>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Will Deacon" <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
	"Fugang . duan" <fugang.duan@cixtech.com>
Subject: Re: [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support
Date: Thu, 20 Feb 2025 11:58:21 +0100	[thread overview]
Message-ID: <4add2867-8c09-454a-b3e2-b4baaeccfd44@app.fastmail.com> (raw)
In-Reply-To: <20250220084020.628704-7-peter.chen@cixtech.com>

On Thu, Feb 20, 2025, at 09:40, Peter Chen wrote:

> +#include "sky1.dtsi"
> +/ {
> +       model = "Radxa Orion O6";
> +       compatible = "radxa,orion-o6";

This should list both the compatible string for the board and
the one for the SoC.

> +
> +       aliases {
> +               serial2 = &uart2;
> +       };

Please put the aliases in the .dts file, not the chip specific
.dtsi file, as each board typically wires these up differently.

Note that the 'serial2' alias names are meant to correspond
to whatever label you find on the board, not the internal
numbering inside of the chip they are wired up to. Usually
these start with 'serial0' for the first one that is enabled.

> +               CPU0: cpu0@0 {
> +                       compatible = "arm,armv8";
> +                       enable-method = "psci";

This should list the actual identifier of the CPU core, not
just "arm,armv8" which is the generic string used in the
models for emulators that don't try to model a particular
core.

> +       memory@80000000 {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               device_type = "memory";
> +               reg = <0x00000000 0x80000000 0x1 0x00000000>;
> +       };

The memory size is not part of the SoC either, unless the only
way to use this SoC is with on-chip eDRAM or similar.

Normally this gets filled by the bootloader based on how
much RAM gets detected.

> +               linux,cma {
> +                       compatible = "shared-dma-pool";
> +                       reusable;
> +                       size = <0x0 0x28000000>;
> +                       linux,cma-default;
> +               };

Same here, this is a setting from the firmware, not the
SoC.

> +       sky1_fixed_clocks: fixed-clocks {
> +               uartclk: uartclk {
> +                       compatible = "fixed-clock";
> +                       #clock-cells = <0>;
> +                       clock-frequency = <100000000>;
> +                       clock-output-names = "uartclk";

> +               uart_apb_pclk: uart_apb_pclk {
> +                       compatible = "fixed-clock";
> +                       #clock-cells = <0>;
> +                       clock-frequency = <200000000>;
> +                       clock-output-names = "apb_pclk";


Clock names don't need "clk" in them, and there should
be no underscore -- use '-' instead of '_' when separating
strings in DT.

> +       soc@0 {
> +               compatible = "simple-bus";
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +               dma-ranges;
> +
> +               uart2: uart@040d0000 {
> +                       compatible = "arm,pl011", "arm,primecell";
> +                       reg = <0x0 0x040d0000 0x0 0x1000>;
> +                       interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
> +                       clock-names = "uartclk", "apb_pclk";
> +                       clocks = <&uartclk>, <&uart_apb_pclk>;
> +                       status = "disabled";
> +               };

It seems strange to list only "uart2" -- usually the dtsi file contains
all of the instances that are present on the chip and leave it
up to the .dts file to enable the ones that are used.

      Arnd

  reply	other threads:[~2025-02-20 10:58 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-20  8:40 [PATCH 0/6] arm64: Introduce CIX P1 (SKY1) SoC Peter Chen
2025-02-20  8:40 ` [PATCH 1/6] dt-bindings: arm: add " Peter Chen
2025-02-20 12:18   ` Krzysztof Kozlowski
2025-02-20  8:40 ` [PATCH 2/6] dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd Peter Chen
2025-02-20 12:18   ` Krzysztof Kozlowski
2025-02-20 13:04     ` Peter Chen
2025-02-20  8:40 ` [PATCH 3/6] MAINTAINERS: Add CIX SoC maintainer entry Peter Chen
2025-02-20  8:40 ` [PATCH 4/6] arm64: Kconfig: add ARCH_CIX for cix silicons Peter Chen
2025-02-20 12:18   ` Krzysztof Kozlowski
2025-02-20 13:03     ` Peter Chen
2025-02-20  8:40 ` [PATCH 5/6] arm64: defconfig: Enable CIX SoC Peter Chen
2025-02-20 12:19   ` Krzysztof Kozlowski
2025-02-20 13:02     ` Peter Chen
2025-02-20  8:40 ` [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support Peter Chen
2025-02-20 10:58   ` Arnd Bergmann [this message]
2025-02-20 12:30     ` Peter Chen
2025-02-21 11:42       ` Krzysztof Kozlowski
2025-02-24  2:26         ` Peter Chen
2025-02-24  8:06           ` Krzysztof Kozlowski
2025-02-24 10:39             ` Peter Chen
2025-02-24 12:07               ` Krzysztof Kozlowski
2025-02-25  1:24                 ` Peter Chen
2025-02-20 12:23   ` Krzysztof Kozlowski
2025-02-21 22:46   ` Rob Herring
2025-02-24  6:09     ` Peter Chen
2025-02-22 20:05   ` Marcin Juszkiewicz
2025-02-24 11:36     ` Peter Chen
2025-02-24 14:06       ` Marcin Juszkiewicz
2025-02-25  3:21         ` Peter Chen
2025-02-20 21:29 ` [PATCH 0/6] arm64: Introduce CIX P1 (SKY1) SoC Rob Herring (Arm)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4add2867-8c09-454a-b3e2-b4baaeccfd44@app.fastmail.com \
    --to=arnd@arndb.de \
    --cc=catalin.marinas@arm.com \
    --cc=cix-kernel-upstream@cixtech.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=fugang.duan@cixtech.com \
    --cc=krzk+dt@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=peter.chen@cixtech.com \
    --cc=robh@kernel.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).