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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id lj13-20020a17090b344d00b00285be64e529sm925899pjb.39.2023.11.29.01.41.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Nov 2023 01:41:41 -0800 (PST) Message-ID: <4b00c41c-7751-40ca-bf2d-53f1179772d4@gmail.com> Date: Wed, 29 Nov 2023 17:41:37 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] arm64: dts: nuvoton: Add pinctrl support for ma35d1 Content-Language: en-US To: Krzysztof Kozlowski , linus.walleij@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, j.neuschaefer@gmx.net Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com References: <20231128061118.575847-1-ychuang570808@gmail.com> <20231128061118.575847-4-ychuang570808@gmail.com> <7edda3ca-b98a-4125-979f-3ee7ac718a9a@linaro.org> <7fed5d90-da04-40fb-8677-b807b6f51cc9@linaro.org> <8663d26e-32b8-4f2b-b497-9efa7440f070@gmail.com> <2fab32e6-23a4-41bb-b47b-4f993fc590dc@linaro.org> From: Jacky Huang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Dear Krzysztof, On 2023/11/29 下午 04:11, Krzysztof Kozlowski wrote: > On 29/11/2023 04:35, Jacky Huang wrote: >>>>> Best regards, >>>>> Krzysztof >>>>> >>>> Yes, it did pass the 'dtbs_check'. I guess the tool does not detect such >>>> issues. >>>> Anyway, I will fix it in the next version. >>> Hm, I see your bindings indeed allow pin-.* and unit addresses, so it is >>> the binding issue. >>> >>> The examples you used as reference - xlnx,zynqmp-pinctrl.yaml and >>> realtek,rtd1315e-pinctrl.yaml - do not mix these as you do. >>> >>> I don't understand why do you need them yet. I don't see any populate of >>> children. There are no compatibles, either. >>> >>> Which part of your driver uses them exactly? >>> >>> Best regards, >>> Krzysztof >>> >> I will move the 'pcfg_default: pin-default' from dtsi to dts, like this: >> >> &pinctrl { >>     pcfg_default: pin-default { >>         slew-rate = <0>; >>         input-schmitt-disable; >>         bias-disable; >>         power-source = <1>; >>         drive-strength = <17100>; >>     }; > This solves nothing. It's the same placement. > > > Best regards, > Krzysztof > OK, it stil be the binding issues. For "^pin-[a-z0-9]+$", I reference to the "pcfg-[a-z0-9-]+$" of rockchip,pinctrl.yaml. My intention is to describe a generic pin configuration, aiming to make the pin description more concise. In actual testing, it proves to be effective. Best Regards, Jacky Huang