From: <Conor.Dooley@microchip.com>
To: <mkl@pengutronix.de>
Cc: <wg@grandegger.com>, <davem@davemloft.net>, <edumazet@google.com>,
<kuba@kernel.org>, <pabeni@redhat.com>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <palmer@dabbelt.com>,
<paul.walmsley@sifive.com>, <aou@eecs.berkeley.edu>,
<Daire.McNamara@microchip.com>, <linux-can@vger.kernel.org>,
<netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<Conor.Dooley@microchip.com>
Subject: Re: [PATCH net-next 0/2] Document PolarFire SoC can controller
Date: Mon, 13 Jun 2022 12:52:00 +0000 [thread overview]
Message-ID: <4c5b43bd-a255-cbc1-c7a3-9a79e34d2e91@microchip.com> (raw)
In-Reply-To: <0f75a804-a0ca-e470-4a57-a5a3ad9dad11@microchip.com>
On 07/06/2022 09:54, Conor.Dooley@microchip.com wrote:
> On 07/06/2022 09:28, Marc Kleine-Budde wrote:
>> On 07.06.2022 07:52:30, Conor.Dooley@microchip.com wrote:
>>> On 07/06/2022 08:15, Marc Kleine-Budde wrote:
>>>> On 07.06.2022 07:54:58, Conor Dooley wrote:
>>>>> When adding the dts for PolarFire SoC, the can controllers were
>>>> ^^^
>>>>> omitted, so here they are...
>>>>
>>>> Nitpick:
>>>> Consider writing "CAN" in capital letters to avoid confusion for the not
>>>> informed reader.
>>>
>>> Yeah, sure. I'll try to get over my fear of capital letters ;)
>>
>> :)
>>
>>>> Is the documentation for the CAN controller openly available? Is there a
>>>> driver somewhere?
>>>
>>> There is a driver /but/ for now only a UIO one so I didn't send it.
>>
>> Brrrrr...
>
> Yeah, I know..
>
>>
>>> There's an online doc & if the horrible link doesn't drop you there
>>> directly, its section 6.12.3:
>>> https://onlinedocs.microchip.com/pr/GUID-0E320577-28E6-4365-9BB8-9E1416A0A6E4-en-US-3/index.html?GUID-A362DC3C-83B7-4441-BECB-B19F9AD48B66
>>>
>>> And a PDF direct download here, see section 4.12.3 (page 72):
>>> https://www.microsemi.com/document-portal/doc_download/1245725-polarfire-soc-fpga-mss-technical-reference-manual
>>
>> Thanks. The documentation is quite sparse, is there a more detailed one?
>
> Nope, that's all I've got...
>
>> The register map cannot be downloaded directly anymore. For reference:
>>
>> http://web.archive.org/web/20220403030214/https://www.microsemi.com/document-portal/doc_download/1244581-polarfire-soc-register-map
>
> Oh that sucks. I know we have had some website issues over the weekend
> which might be the problem there. I'll try to bring it up and find out.
>
Hey Marc,
Doc is still not available but should be getting fixed.
What do I need to do for this binding? Are you happy to accept it without
a driver if I add links to the documentation and a working link to the
register map?
Thanks,
Conor.
next prev parent reply other threads:[~2022-06-13 15:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 6:54 [PATCH net-next 0/2] Document PolarFire SoC can controller Conor Dooley
2022-06-07 6:54 ` [PATCH net-next 1/2] dt-bindings: can: mpfs: document the mpfs " Conor Dooley
2022-06-07 16:19 ` Rob Herring
2022-06-07 6:55 ` [PATCH net-next 2/2] riscv: dts: microchip: add mpfs's can controllers Conor Dooley
2022-06-07 7:15 ` [PATCH net-next 0/2] Document PolarFire SoC can controller Marc Kleine-Budde
2022-06-07 7:52 ` Conor.Dooley
2022-06-07 8:28 ` Marc Kleine-Budde
2022-06-07 8:54 ` Conor.Dooley
2022-06-13 12:52 ` Conor.Dooley [this message]
2022-06-13 13:45 ` Marc Kleine-Budde
2022-06-13 13:48 ` Conor.Dooley
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