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Fri, 10 Nov 2023 03:10:37 -0800 (PST) Received: from [192.168.1.20] ([178.197.218.126]) by smtp.gmail.com with ESMTPSA id r20-20020aa7cb94000000b00543597cd190sm978412edt.47.2023.11.10.03.10.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 Nov 2023 03:10:36 -0800 (PST) Message-ID: <4cf3d481-c16d-4b1c-ab45-3ceff80b0b1b@linaro.org> Date: Fri, 10 Nov 2023 12:10:34 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 5/7] riscv: dts: thead: Add TH1520 mmc controllers and sdhci clock Content-Language: en-US To: Drew Fustini , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Adrian Hunter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Fu Wei , Conor Dooley Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20231109-th1520-mmc-v5-0-018bd039cf17@baylibre.com> <20231109-th1520-mmc-v5-5-018bd039cf17@baylibre.com> From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 10/11/2023 06:41, Drew Fustini wrote: > Add node for the SDHCI fixed clock. Add mmc0 node for the first mmc > controller instance which is typically connected to the eMMC device. > Add mmc1 node for the second mmc controller instance which is typically > connected to microSD slot. > > Signed-off-by: Drew Fustini > --- > arch/riscv/boot/dts/thead/th1520.dtsi | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index ff364709a6df..f5ec9326c4b8 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -134,6 +134,13 @@ uart_sclk: uart-sclk-clock { > #clock-cells = <0>; > }; > > + sdhci_clk: sdhci-clock { > + compatible = "fixed-clock"; > + clock-frequency = <198000000>; > + clock-output-names = "sdhci_clk"; > + #clock-cells = <0>; > + }; > + > soc { > compatible = "simple-bus"; > interrupt-parent = <&plic>; > @@ -292,6 +299,22 @@ dmac0: dma-controller@ffefc00000 { > status = "disabled"; > }; > > + mmc0: mmc@ffe7080000 { > + compatible = "thead,th1520-dwcmshc"; > + reg = <0xff 0xe7080000 0x0 0x10000>; > + interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&sdhci_clk>; > + clock-names = "core"; You miss disable in each mmc node. Best regards, Krzysztof