From: "Jan Kundrát" <jan.kundrat@cesnet.cz>
To: devicetree@vger.kernel.org
Cc: linux-gpio@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
Phil Reid <preid@electromag.com.au>,
Sebastian Reichel <sebastian.reichel@collabora.co.uk>,
Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: Re: [PATCH v2 3/4] pinctrl: mcp23s08: work around GPIO line naming
Date: Fri, 08 Mar 2019 13:35:26 +0100 [thread overview]
Message-ID: <4d99bc24-293e-4a75-a6de-c40cd13b62e8@cesnet.cz> (raw)
In-Reply-To: <517dcdda21ea0b0df884bc6adcba1dadb78b66b1.1551966077.git.jan.kundrat@cesnet.cz>
Sorry for missing the DT maintainers on this one.
Jan
On čtvrtek 7. března 2019 14:31:02 CET, Jan Kundrát wrote:
> This driver is a bit weird because it can hide several gpio_chip
> instances underneath a single SPI slave. One cannot put the
> gpio-line-names DT stanza directly to the SPI slave when the
> spi-present-mask has more than one bit set.
>
> I'm making up the `gpio-bank` DT child name as well as its `address`
> property. We need something to match the DT entries with the SPI
> address.
>
> Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz>
> Reviewed-by: Phil Reid <preid@electromag.com.au>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> ---
> v2: Depend on exported devprop_gpiochip_set_names
> ---
> .../bindings/pinctrl/pinctrl-mcp23s08.txt | 35 +++++++++++++++++++
> drivers/pinctrl/pinctrl-mcp23s08.c | 11 ++++++
> 2 files changed, 46 insertions(+)
>
> diff --git
> a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
> b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
> index 625a22e2f211..a0b1eb9aedad 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt
> @@ -144,3 +144,38 @@ gpio21: gpio@21 {
> bias-pull-up;
> };
> };
> +
> +Line naming
> +===========
> +
> +Because several gpio_chip instances are hidden below a single device tree
> +node, it is necessary to split the names into several child nodes. Ensure
> +that the configured addresses match those in the
> microchip,spi-present-mask:
> +
> +gpio@0 {
> + compatible = "microchip,mcp23s17";
> + gpio-controller;
> + #gpio-cells = <2>;
> + /* this bitmask has bits #0 (0x01) and #2 (0x04) set */
> + spi-present-mask = <0x05>;
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> +
> + gpio-bank@1 {
> + address = <0>;
> + gpio-line-names =
> + "GPA0",
> + "GPA1",
> + ...
> + "GPA7",
> + "GPB0",
> + "GPB1",
> + ...
> + "GPB7";
> + };
> +
> + gpio-bank@2 {
> + address = <2>;
> + gpio-line-names = ...
> + };
> +};
> diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c
> b/drivers/pinctrl/pinctrl-mcp23s08.c
> index fd9d6f026d70..7810f56f8dd1 100644
> --- a/drivers/pinctrl/pinctrl-mcp23s08.c
> +++ b/drivers/pinctrl/pinctrl-mcp23s08.c
> @@ -1102,6 +1102,7 @@ static int mcp23s08_probe(struct spi_device *spi)
> int status, type;
> unsigned ngpio = 0;
> const struct of_device_id *match;
> + struct device_node *np;
>
> match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
> if (match)
> @@ -1170,6 +1171,16 @@ static int mcp23s08_probe(struct spi_device *spi)
> if (pdata->base != -1)
> pdata->base += data->mcp[addr]->chip.ngpio;
> ngpio += data->mcp[addr]->chip.ngpio;
> +
> + for_each_available_child_of_node(spi->dev.of_node, np) {
> + u32 chip_addr;
> + status = of_property_read_u32(np, "address", &chip_addr);
> + if (status)
> + continue;
> + if (chip_addr != addr)
> + continue;
> + devprop_gpiochip_set_names(&data->mcp[addr]->chip,
> of_fwnode_handle(np));
> + }
> }
> data->ngpio = ngpio;
>
next parent reply other threads:[~2019-03-08 12:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1551966076.git.jan.kundrat@cesnet.cz>
[not found] ` <517dcdda21ea0b0df884bc6adcba1dadb78b66b1.1551966077.git.jan.kundrat@cesnet.cz>
2019-03-08 12:35 ` Jan Kundrát [this message]
[not found] ` <20190307223515.653197dc@windsurf>
2019-03-08 12:51 ` [PATCH v2 3/4] pinctrl: mcp23s08: work around GPIO line naming Jan Kundrát
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