From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0490C433FE for ; Thu, 19 May 2022 11:35:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234772AbiESLfj (ORCPT ); Thu, 19 May 2022 07:35:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229600AbiESLff (ORCPT ); Thu, 19 May 2022 07:35:35 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8E4CB2250 for ; Thu, 19 May 2022 04:35:33 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id t25so8599001lfg.7 for ; Thu, 19 May 2022 04:35:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :cc:references:from:in-reply-to:content-transfer-encoding; bh=TCjmGPy0SDboBVIutYmABeJhjmy/yNmOBhY70ZJKm34=; b=u2wKZJYFwKripn4BJEh9JTJClCrPMxeeVAUY/FR2Rp6+zlFZZCfCDf6Wo561rrqIu4 P8dDLkJPXHJVZuNYIXmUpYpE+2EM8wusyCcOgFTImIjGzXi3+lv0e5iZHgEZ6Wb0tUvB PCKfOJMAS6SHwuF+evavImIceRY1EPIfJPMfGaEDH7qHXoj4xmgeN8nLql8xfHUbXEO1 5pBk+wQlbz8IYX18XZgImAr2t+PpuBYZ340ecUmpDJ1RBnY57g6OAiMlp9naS3z3CtzE Ld/p2RiDERai9j/4wdDec4setIuDv8ZelvbXvT7M6icKCqeDJhyY+s1BGwMaMxrV8I6Z M1rQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:cc:references:from:in-reply-to :content-transfer-encoding; bh=TCjmGPy0SDboBVIutYmABeJhjmy/yNmOBhY70ZJKm34=; b=vrIZjt80Szuh13MCQsZXazvUxhQm+/okgDtKXIrQKVjgh643YiwTj4mX7qe3stHs8x XYCo49iI4KYJZB7SBD8pa+wvzuwtHmBwyO2+1hADISywj0PqFjMbVwD/cmh66CaROAQF qCkb6sDztStJI2b2gzQW90JG76UQs/9+w0KtRrn7zC6f+WegSDJRU1D/U8/95kyU6Mhh roGlJxeZ6JzdGvJlTZpbVEg7lA1Z28VnvJGqu4tiKkFYvNO/432N9JV03z/KJPm6I5fT iwf8ccX3nfcxQCK8EbuihTFa3mEM2FyzNr1LLa1wOuSFKEM51w3wslzKsz0PxCDYWR57 oBjA== X-Gm-Message-State: AOAM532t3maU6c6ZHqRIn0w6DOLbhngQdDZaclQ7ySJ5JBFHHiKxPjOa Rsm2ScunGRcuaBxY2UF/j5qum8bzCOR364K4 X-Google-Smtp-Source: ABdhPJzLH+q3cnn1YgCQYp6QlL4DRa+F5w1aD7hiBWy/faJbh3DSsLSkr1yk1PC6lRxWhrXO47eXSQ== X-Received: by 2002:a05:6512:1395:b0:446:d382:79a5 with SMTP id p21-20020a056512139500b00446d38279a5mr3034085lfa.210.1652960132258; Thu, 19 May 2022 04:35:32 -0700 (PDT) Received: from [192.168.0.17] (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id n18-20020a2e9052000000b00253d8962fffsm99317ljg.18.2022.05.19.04.35.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 May 2022 04:35:31 -0700 (PDT) Message-ID: <4d9b29e8-b171-e181-e2a7-2c8c80107ab1@linaro.org> Date: Thu, 19 May 2022 13:35:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v4 6/6] arm64: dts: qcom: Add PMP8074 DTSI Content-Language: en-US To: Robert Marko Cc: Andy Gross , Bjorn Andersson , lgirdwood@gmail.com, broonie@kernel.org, Rob Herring , krzysztof.kozlowski+dt@linaro.org, linux-arm-msm , open list , Devicetree List , Konrad Dybcio References: <20220518184825.1034976-1-robimarko@gmail.com> <20220518184825.1034976-6-robimarko@gmail.com> <015c60e9-78f6-f0f0-5af0-733a78fbdf65@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 19/05/2022 13:21, Robert Marko wrote: > On Thu, 19 May 2022 at 13:07, Krzysztof Kozlowski > wrote: >> >> On 18/05/2022 20:48, Robert Marko wrote: >>> PMP8074 is a companion PMIC to the Qualcomm IPQ8074 series that is >>> controlled via SPMI. >>> >>> Since we now have support for the regulators inside of it add DTSI >>> for it. >>> >>> Signed-off-by: Robert Marko >>> --- >>> arch/arm64/boot/dts/qcom/pmp8074.dtsi | 38 +++++++++++++++++++++++++++ >> >> This file is not referenced by anything, thus not possible to compile >> nor verify. > > That is correct, I can include it on HK01 which has an SDHCI controller > and thus can consume L11 for VQMMC so that HS200 and higher work. Yes, otherwise this does not have any effect. > > I wanted to include the nodes directly in the SoC DTSI and set L11 as VQMMC > for SDHCI there as this is a companion PMIC and always present, but > the established > procedure is for the PMIC to have its own DTSI and then be included per board. Which was correct suggestion but it is not relevant here. In your previous approach your PMIC would be included on every board via SoC DTSI. Now your PMIC is not included at all. Best regards, Krzysztof