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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Alexander Koskovich <AKoskovich@pm.me>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Kees Cook <kees@kernel.org>,
	Tony Luck <tony.luck@intel.com>,
	"Guilherme G. Piccoli" <gpiccoli@igalia.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3
Date: Tue, 10 Mar 2026 12:25:16 +0100	[thread overview]
Message-ID: <4df4b8f2-ecc9-447b-8a69-237c2a5841a0@oss.qualcomm.com> (raw)
In-Reply-To: <20260308-sm8250-asus-obiwan-v1-3-3c72941eb796@pm.me>

On 3/8/26 9:40 PM, Alexander Koskovich wrote:
> Supported functionality as of this initial submission:
> * Armor Case & Dock Hall Sensors
> * Camera flash/torch LED
> * Display (Tianma TA066VVHM03)
> * DisplayPort Alt Mode
> * Macro Camera (OV8856)
> * GPU (Adreno 650)
> * NFC (NXP PN553)
> * Power Button, Volume Keys
> * Regulators
> * Remoteprocs (ADSP, CDSP, SLPI)
> * UFS
> * USB
> * Video Codec (Venus)
> * Wi-Fi / Bluetooth (QCA6390)
> 
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---

[...]

> +&cci1_i2c0 {
> +	camera@36 {
> +		compatible = "ovti,ov8856";
> +		reg = <0x36>;
> +
> +		rotation = <90>;
> +		orientation = <1>;
> +
> +		reset-gpios = <&tlmm 109 GPIO_ACTIVE_LOW>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&cam_ov8856_default>;

property-n
property-names

in this order, file-wide, please

[...]

> +&cpu7_opp_table {
> +	cpu7_opp21: opp-3091200000 {
> +		opp-hz = /bits/ 64 <3091200000>;
> +		opp-peak-kBps = <8368000 51609600>;
> +	};
> +};

This, as we've established on some other thread, is fine to put in
8250.dtsi

[...]

> +				port@0 {
> +					reg = <0>;
> +					rt1715_con_hs: endpoint {

\n above, please, to separate the subnode from properties

[...]

> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pm8008_default>;

ditto

[...]

> +			port@0 {
> +				reg = <0>;
> +				pm8150b_hs: endpoint {

ditto

[...]

> +&uart12 {
> +	/*
> +	 * Debug UART routed through a mux with an enable line on
> +	 * GPIO 170. The active state is unknown, so data may not
> +	 * pass through.

Hm? Is that software-triggered, or is there some sort of a debug connector?

Konrad

  parent reply	other threads:[~2026-03-10 11:25 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-08 20:40 [PATCH 0/3] Add support for the ASUS ROG Phone 3 (SM8250) Alexander Koskovich
2026-03-08 20:40 ` [PATCH 1/3] dt-bindings: arm: qcom: Add ASUS ROG Phone 3 Alexander Koskovich
2026-03-09  7:59   ` Krzysztof Kozlowski
2026-03-10  3:04     ` Alexander Koskovich
2026-03-10  7:16       ` Krzysztof Kozlowski
2026-03-08 20:40 ` [PATCH 2/3] arm64: dts: qcom: sm8250: Add label for reserved-memory node Alexander Koskovich
2026-03-09  8:00   ` Krzysztof Kozlowski
2026-03-09  8:00     ` Krzysztof Kozlowski
2026-03-09  8:08       ` Alexander Koskovich
2026-03-09 12:40         ` Konrad Dybcio
2026-03-08 20:40 ` [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3 Alexander Koskovich
2026-03-09 20:34   ` Dmitry Baryshkov
2026-03-10  2:57     ` Alexander Koskovich
2026-03-10  3:21       ` Dmitry Baryshkov
2026-03-10  3:32         ` Alexander Koskovich
2026-03-10  4:56           ` Alexander Koskovich
2026-03-10 11:25   ` Konrad Dybcio [this message]
2026-03-10 15:10     ` Alexander Koskovich
2026-03-11  2:40       ` Alexander Koskovich
2026-03-11  4:35         ` Dmitry Baryshkov

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