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[188.155.168.84]) by smtp.gmail.com with ESMTPSA id ck7sm1294186ejb.44.2022.02.06.03.33.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 06 Feb 2022 03:33:28 -0800 (PST) Message-ID: <4e2bec9b-4759-b699-fa7b-974f5f43da9d@canonical.com> Date: Sun, 6 Feb 2022 12:33:27 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH V1 03/10] dt-bindings: memory: Add Tegra234 PCIe memory Content-Language: en-US To: Vidya Sagar , bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com Cc: kishon@ti.com, vkoul@kernel.org, kw@linux.com, p.zabel@pengutronix.de, mperttunen@nvidia.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com References: <20220205162144.30240-1-vidyas@nvidia.com> <20220205162144.30240-4-vidyas@nvidia.com> From: Krzysztof Kozlowski In-Reply-To: <20220205162144.30240-4-vidyas@nvidia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 05/02/2022 17:21, Vidya Sagar wrote: > Add the memory client and stream ID definitions for the PCIe hardware > found on Tegra234 SoCs. I could not find dependencies or merging strategy in cover letter. Please always describe it, so I don't have to go through all the patches to figure this out. > > Signed-off-by: Vidya Sagar > --- > include/dt-bindings/memory/tegra234-mc.h | 64 ++++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > > diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h > index 2662f70c15c6..60017684858a 100644 > --- a/include/dt-bindings/memory/tegra234-mc.h > +++ b/include/dt-bindings/memory/tegra234-mc.h > @@ -7,15 +7,53 @@ > #define TEGRA234_SID_INVALID 0x00 > #define TEGRA234_SID_PASSTHROUGH 0x7f > > +/* NISO0 stream IDs */ > +#define TEGRA234_SID_PCIE0 0x12U > +#define TEGRA234_SID_PCIE4 0x13U > +#define TEGRA234_SID_PCIE5 0x14U > +#define TEGRA234_SID_PCIE6 0x15U > +#define TEGRA234_SID_PCIE9 0x1FU > > /* NISO1 stream IDs */ > #define TEGRA234_SID_SDMMC4 0x02 > +#define TEGRA234_SID_PCIE1 0x5U > +#define TEGRA234_SID_PCIE2 0x6U > +#define TEGRA234_SID_PCIE3 0x7U > +#define TEGRA234_SID_PCIE7 0x8U > +#define TEGRA234_SID_PCIE8 0x9U > +#define TEGRA234_SID_PCIE10 0xBU I don't see usage of these... > #define TEGRA234_SID_BPMP 0x10 > > /* > * memory client IDs > */ > > +/* PCIE6 read clients */ > +#define TEGRA234_MEMORY_CLIENT_PCIE6AR 0x28 I see you use them in DTS but not in mc driver. Don't you miss anything here? > +/* PCIE6 write clients */ > +#define TEGRA234_MEMORY_CLIENT_PCIE6AW 0x29 > +/* PCIE7 read clients */ > +#define TEGRA234_MEMORY_ Best regards, Krzysztof