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[94.29.39.224]) by smtp.googlemail.com with ESMTPSA id e4sm16288858ljl.27.2020.03.10.09.43.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Mar 2020 09:43:13 -0700 (PDT) Subject: Re: [PATCH v5 5/8] memory: tegra: Add EMC scaling support code for Tegra210 To: Thierry Reding Cc: Jon Hunter , Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Joseph Lo , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20200310152003.2945170-1-thierry.reding@gmail.com> <20200310152003.2945170-6-thierry.reding@gmail.com> From: Dmitry Osipenko Message-ID: <4ea3a96f-52cb-4eab-cf92-932f6882ad85@gmail.com> Date: Tue, 10 Mar 2020 19:43:12 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0 MIME-Version: 1.0 In-Reply-To: <20200310152003.2945170-6-thierry.reding@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 10.03.2020 18:20, Thierry Reding пишет: > From: Joseph Lo > > This is the initial patch for Tegra210 EMC frequency scaling. It has the > code to program various aspects of the EMC that are standardized, but it > does not yet include the specific programming sequence needed for clock > scaling. > > The driver is designed to support LPDDR4 SDRAM. Devices that use LPDDR4 > need to perform training of the RAM before it can be used. Firmware will > perform this training during early boot and pass a table of supported > frequencies to the kernel via device tree. > > For the frequencies above 800 MHz, periodic retraining is needed to > compensate for changes in timing. This periodic training will have to be > performed until the frequency drops back to or below 800 MHz. > > This driver provides helpers used during this runtime retraining that > will be used by the sequence specific code in a follow-up patch. > > Based on work by Peter De Schrijver . > > Signed-off-by: Joseph Lo > Signed-off-by: Thierry Reding > --- > Changes in v5: > - major rework and cleanup > > drivers/memory/tegra/tegra210-emc.c | 1952 +++++++++++++++++++++------ > drivers/memory/tegra/tegra210-emc.h | 893 +++++++++++- > 2 files changed, 2390 insertions(+), 455 deletions(-) > > diff --git a/drivers/memory/tegra/tegra210-emc.c b/drivers/memory/tegra/tegra210-emc.c > index 80ea14d1e6ce..4ea8fb70a4fd 100644 > --- a/drivers/memory/tegra/tegra210-emc.c > +++ b/drivers/memory/tegra/tegra210-emc.c > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > - * Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved. > + * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved. > */ Would be nice to avoid all the unnecessary changes, like the one above and then all the code's removals/reshuffling. Such that a new patch was a clean addition to a previous patch, instead of a re-write.