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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 186376 [Jul 08 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: gnstark@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 23 0.3.23 8881c50ebb08f9085352475be251cf18bb0fcfdd, {Tracking_uf_ne_domains}, {Tracking_from_domain_doesnt_match_to}, lore.kernel.org:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;127.0.0.199:7.1.2;smtp.sberdevices.ru:7.1.1,5.0.1;100.64.160.123:7.1.2;salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean, bases: 2024/07/08 12:56:00 X-KSMG-LinksScanning: Clean, bases: 2024/07/08 14:31:00 X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/07/08 12:25:00 #25908179 X-KSMG-AntiVirus-Status: Clean, skipped Hello Jerome Thanks for the review On 7/8/24 16:11, Jerome Brunet wrote: > On Tue 02 Jul 2024 at 15:34, George Stark wrote: > >> The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF. >> >> Signed-off-by: George Stark >> Signed-off-by: Dmitry Rokosov >> --- >> .../devicetree/bindings/pwm/pwm-amlogic.yaml | 17 +++++++++++++++++ >> 1 file changed, 17 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> index 1d71d4f8f328..e021cf59421a 100644 >> --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml ... > > The change is not only introducing a1 compatibility but also allowing a > power-domain for the other SoC, even if optional. > > If that is intended, it should be stated in the description and probably > a separate change. AFAIK the only SoC with a separate PD for PWM is A1 (currently). I added PD to bindings by an independent change in series #2 [1] but Rob proposed it should be squashed into compatible patch. The only thing missed in series #2 was the conditional schema making PD required for A1. I personally would prefer to add PD as a separate change. I'll give it a try. [1] https://lore.kernel.org/lkml/20240701172016.523402-1-gnstark@salutedevices.com/T/#m0e004fc0d22e205aa3bf6bdd0284d251f26eb0f3 > >> "#pwm-cells": >> const: 3 >> >> @@ -136,6 +143,16 @@ allOf: >> required: >> - clocks >> >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - amlogic,meson-a1-pwm >> + then: >> + required: >> + - power-domains >> + >> additionalProperties: false >> >> examples: > -- Best regards George