From: Stephen Boyd <sboyd@kernel.org>
To: Jacky Huang <ychuang570808@gmail.com>,
gregkh@linuxfoundation.org, jirislaby@kernel.org,
krzysztof.kozlowski+dt@linaro.org, lee@kernel.org,
mturquette@baylibre.com, p.zabel@pengutronix.de,
robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
arnd@arndb.de, schung@nuvoton.com, mjchen@nuvoton.com,
Jacky Huang <ychuang3@nuvoton.com>
Subject: Re: [PATCH v7 09/12] clk: nuvoton: Add clock driver for ma35d1 clock controller
Date: Thu, 13 Apr 2023 13:27:52 -0700 [thread overview]
Message-ID: <4f57a7ccc946d18be5eb9a47fa69e5f8.sboyd@kernel.org> (raw)
In-Reply-To: <20230412053824.106-10-ychuang570808@gmail.com>
Quoting Jacky Huang (2023-04-11 22:38:21)
> diff --git a/drivers/clk/nuvoton/clk-ma35d1-divider.c b/drivers/clk/nuvoton/clk-ma35d1-divider.c
> new file mode 100644
> index 000000000000..8d573ba3dfd3
> --- /dev/null
> +++ b/drivers/clk/nuvoton/clk-ma35d1-divider.c
> @@ -0,0 +1,134 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2023 Nuvoton Technology Corp.
[...]
> +struct clk_hw *ma35d1_reg_adc_clkdiv(struct device *dev, const char *name,
> + const char *parent_name,
> + spinlock_t *lock,
> + unsigned long flags, void __iomem *reg,
> + u8 shift, u8 width, u32 mask_bit)
> +{
> + struct ma35d1_adc_clk_div *div;
> + struct clk_init_data init;
> + struct clk_div_table *table;
> + u32 max_div, min_div;
> + struct clk_hw *hw;
> + int ret;
> + int i;
> +
> + div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL);
> + if (!div)
> + return ERR_PTR(-ENOMEM);
> +
> + max_div = clk_div_mask(width) + 1;
> + min_div = 1;
> +
> + table = devm_kcalloc(dev, max_div + 1, sizeof(*table), GFP_KERNEL);
> + if (!table)
> + return ERR_PTR(-ENOMEM);
> +
> + for (i = 0; i < max_div; i++) {
> + table[i].val = min_div + i;
> + table[i].div = 2 * table[i].val;
> + }
> + table[max_div].val = 0;
> + table[max_div].div = 0;
> +
> + init.name = name;
> + init.ops = &ma35d1_adc_clkdiv_ops;
> + init.flags |= flags;
> + init.parent_names = parent_name ? &parent_name : NULL;
Can you use parent_data instead?
> + init.num_parents = parent_name ? 1 : 0;
> +
> + div->reg = reg;
> + div->shift = shift;
> + div->width = width;
> + div->mask = mask_bit ? BIT(mask_bit) : 0;
> + div->lock = lock;
> + div->hw.init = &init;
> + div->table = table;
> +
> + hw = &div->hw;
> + ret = devm_clk_hw_register(dev, hw);
> + if (ret)
> + return ERR_PTR(ret);
> + return hw;
> +}
> diff --git a/drivers/clk/nuvoton/clk-ma35d1-pll.c b/drivers/clk/nuvoton/clk-ma35d1-pll.c
> new file mode 100644
> index 000000000000..6de67c964a2d
> --- /dev/null
> +++ b/drivers/clk/nuvoton/clk-ma35d1-pll.c
> @@ -0,0 +1,315 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2023 Nuvoton Technology Corp.
> + * Author: Chi-Fang Li <cfli0@nuvoton.com>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk-provider.h>
> +#include <linux/container_of.h>
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/slab.h>
> +
> +#include "clk-ma35d1.h"
> +
> +struct ma35d1_clk_pll {
> + struct clk_hw hw;
> + u8 type;
> + u8 mode;
> + void __iomem *ctl0_base;
> + void __iomem *ctl1_base;
> + void __iomem *ctl2_base;
> +};
> +
[..]
> +struct clk_hw *ma35d1_reg_clk_pll(enum ma35d1_pll_type type,
> + struct device *dev,
> + u8 u8mode, const char *name,
> + const char *parent,
> + void __iomem *base)
> +{
> + struct ma35d1_clk_pll *pll;
> + struct clk_hw *hw;
> + struct clk_init_data init = {};
> + int ret;
> +
> + pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL);
> + if (!pll)
> + return ERR_PTR(-ENOMEM);
> +
> + pll->type = type;
> + pll->mode = u8mode;
> + pll->ctl0_base = base + REG_PLL_CTL0_OFFSET;
> + pll->ctl1_base = base + REG_PLL_CTL1_OFFSET;
> + pll->ctl2_base = base + REG_PLL_CTL2_OFFSET;
> +
> + init.name = name;
> + init.flags = 0;
> + init.parent_names = &parent;
Can you use parent_data instead?
> + init.num_parents = 1;
> +
> + if (type == MA35D1_CAPLL || type == MA35D1_DDRPLL)
> + init.ops = &ma35d1_clk_fixed_pll_ops;
> + else
> + init.ops = &ma35d1_clk_pll_ops;
> +
> + pll->hw.init = &init;
> + hw = &pll->hw;
> +
> + ret = devm_clk_hw_register(dev, hw);
> + if (ret)
> + return ERR_PTR(ret);
> + return hw;
> +}
> diff --git a/drivers/clk/nuvoton/clk-ma35d1.c b/drivers/clk/nuvoton/clk-ma35d1.c
> new file mode 100644
> index 000000000000..066e1c6f2d35
> --- /dev/null
> +++ b/drivers/clk/nuvoton/clk-ma35d1.c
> @@ -0,0 +1,897 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2023 Nuvoton Technology Corp.
> + * Author: Chi-Fang Li <cfli0@nuvoton.com>
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/spinlock.h>
> +#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> +#include "clk-ma35d1.h"
> +
> +static DEFINE_SPINLOCK(ma35d1_lock);
> +
> +static const struct clk_parent_data ca35clk_sel_clks[] = {
> + { .fw_name = "hxt", .name = "hxt" },
> + { .fw_name = "capll", .name = "capll" },
> + { .fw_name = "ddrpll", .name = "ddrpll" },
> + { .fw_name = "dummy", .name = "dummy" }
What is 'dummy'? Is that in the binding? Note, don't put both .fw_name
and .name in the binding. For new drivers, prefer to use .index or .hw
and never use .name to describe parents.
> +};
> +
> +static const char *const sysclk0_sel_clks[] = {
> + "epll_div2", "syspll"
[...]
> diff --git a/drivers/clk/nuvoton/clk-ma35d1.h b/drivers/clk/nuvoton/clk-ma35d1.h
> new file mode 100644
> index 000000000000..28c60f081788
> --- /dev/null
> +++ b/drivers/clk/nuvoton/clk-ma35d1.h
> @@ -0,0 +1,123 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2023 Nuvoton Technology Corp.
> + * Author: Chi-Fang Li <cfli0@nuvoton.com>
> + */
> +
> +#ifndef __DRV_CLK_NUVOTON_MA35D1_H
> +#define __DRV_CLK_NUVOTON_MA35D1_H
Is this header included in one C file? If so, remove the header file and
put the contents in the C file.
next prev parent reply other threads:[~2023-04-13 20:27 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-12 5:38 [PATCH v7 00/12] Introduce Nuvoton ma35d1 SoC Jacky Huang
2023-04-12 5:38 ` [PATCH v7 01/12] arm64: Kconfig.platforms: Add config for Nuvoton MA35 platform Jacky Huang
2023-04-12 5:38 ` [PATCH v7 02/12] arm64: defconfig: Add support for Nuvoton MA35 family SoCs Jacky Huang
2023-04-12 5:38 ` [PATCH v7 03/12] dt-bindings: clock: nuvoton: add binding for ma35d1 clock controller Jacky Huang
2023-04-12 5:38 ` [PATCH v7 04/12] dt-bindings: reset: nuvoton: Document ma35d1 reset control Jacky Huang
2023-04-13 16:58 ` Krzysztof Kozlowski
2023-04-14 0:55 ` Jacky Huang
2023-04-14 7:46 ` Krzysztof Kozlowski
2023-04-14 8:27 ` Jacky Huang
2023-04-13 20:21 ` Stephen Boyd
2023-04-14 1:29 ` Jacky Huang
2023-04-12 5:38 ` [PATCH v7 05/12] dt-bindings: mfd: syscon: Add nuvoton,ma35d1-sys compatible Jacky Huang
2023-04-13 16:47 ` Krzysztof Kozlowski
2023-04-14 1:11 ` Jacky Huang
2023-04-14 7:03 ` Lee Jones
2023-04-14 8:34 ` Jacky Huang
2023-04-19 15:37 ` Lee Jones
2023-04-12 5:38 ` [PATCH v7 06/12] dt-bindings: arm: Add initial bindings for Nuvoton platform Jacky Huang
2023-04-13 17:01 ` Krzysztof Kozlowski
2023-04-14 1:27 ` Jacky Huang
2023-04-12 5:38 ` [PATCH v7 07/12] dt-bindings: serial: Document ma35d1 uart controller Jacky Huang
2023-04-12 5:38 ` [PATCH v7 08/12] arm64: dts: nuvoton: Add initial ma35d1 device tree Jacky Huang
2023-04-12 5:38 ` [PATCH v7 09/12] clk: nuvoton: Add clock driver for ma35d1 clock controller Jacky Huang
2023-04-13 20:27 ` Stephen Boyd [this message]
2023-04-15 3:58 ` Jacky Huang
2023-04-18 20:23 ` Stephen Boyd
2023-04-19 0:32 ` Jacky Huang
2023-04-12 5:38 ` [PATCH v7 10/12] reset: Add Nuvoton ma35d1 reset driver support Jacky Huang
2023-04-24 19:21 ` Philipp Zabel
2023-04-25 1:30 ` Jacky Huang
2023-04-25 7:40 ` Ilpo Järvinen
2023-04-25 8:07 ` Jacky Huang
2023-04-12 5:38 ` [PATCH v7 11/12] tty: serial: Add Nuvoton ma35d1 serial " Jacky Huang
2023-04-14 6:47 ` Jiri Slaby
2023-04-16 2:31 ` Jacky Huang
2023-04-19 3:43 ` kernel test robot
2023-04-12 5:38 ` [PATCH v7 12/12] MAINTAINERS: Add entry for NUVOTON MA35 Jacky Huang
2023-04-13 17:01 ` Krzysztof Kozlowski
2023-04-14 1:22 ` Jacky Huang
2023-04-14 7:46 ` Krzysztof Kozlowski
2023-04-14 9:04 ` Jacky Huang
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