From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: linux-omap <linux-omap@vger.kernel.org>,
Tony Lindgren <tony@atomide.com>,
"Cousson, Benoit" <b-cousson@ti.com>,
"devicetree-discuss@lists.ozlabs.org"
<devicetree-discuss@lists.ozlabs.org>,
Grant Likely <grant.likely@secretlab.ca>
Subject: OMAP: Configuring CONTROL_DEVCONF0 register via DT with pinctrl
Date: Fri, 27 Jul 2012 12:43:17 +0300 [thread overview]
Message-ID: <501262B5.1080004@ti.com> (raw)
Hello,
I need to find a solution to control 2 bits in CONTROL_DEVCONF0 on OMAP2/3 for
McBSP1 CLKR/FSR signal routing.
In boards using McBSP1 we might need to change bit 3 and 4 based on the audio
setup (how the board has been wired).
So far I have come up with the following idea to handle to but not really sure
if it is the correct way (I have taken the idea from the arm/dts: Add AM33XX
basic pinctrl support series).
In .dtsi file of the SoC:
control_devconf0: pinmux@48002274 {
compatible = "pinctrl-single";
reg = <0x48002274 4>; /* Single register */
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x5F>;
};
In the .dts file of the board which needs to change the CLKR/FSR configuration:
&control_devconf0 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
mcbsp1_pins: pinmux_mcbsp1_pins {
pinctrl-single,pins = <0x00 0x18>; /* CLKR/FSR from CLKX/FSX
* pin */
};
};
Thanks for the help,
Péter
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next reply other threads:[~2012-07-27 9:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-27 9:43 Peter Ujfalusi [this message]
2012-08-07 11:10 ` OMAP: Configuring CONTROL_DEVCONF0 register via DT with pinctrl Tony Lindgren
2012-08-08 11:53 ` Peter Ujfalusi
2012-08-09 6:36 ` Tony Lindgren
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