From mboxrd@z Thu Jan 1 00:00:00 1970 From: John Crispin Subject: Re: [PATCH 3/6] OF: pinctrl: MIPS: lantiq: adds support for FALCON SoC Date: Wed, 15 Aug 2012 22:14:05 +0200 Message-ID: <502C030D.1030604@openwrt.org> References: <1343112660-12245-1-git-send-email-blogic@openwrt.org> <1343112660-12245-3-git-send-email-blogic@openwrt.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: Linus Walleij Cc: Thomas Langer , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, Ralf Baechle List-Id: devicetree@vger.kernel.org Hi Linus, Is it ok if i have these pinctrl patches go upstream via the MIPS tree ? Grant seems to still be on vacation and i would like to see them enter 3.7 Thanks, John On 28/07/12 01:23, Linus Walleij wrote: > On Tue, Jul 24, 2012 at 8:50 AM, John Crispin wrote: > >> Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks >> of up to 32 pins. >> >> Signed-off-by: John Crispin >> Signed-off-by: Thomas Langer >> Cc: Linus Walleij >> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org >> Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > No big issues and looking really sweet so: > Acked-by: Linus Walleij > >> --- a/arch/mips/lantiq/Kconfig >> +++ b/arch/mips/lantiq/Kconfig >> @@ -20,6 +20,7 @@ config SOC_XWAY >> >> config SOC_FALCON >> bool "FALCON" >> + select PINCTRL_FALCON > I think you need to add "select PINCTRL" above "select PINCTRL_FALCON" > for this to work. > > Atleast I had to do that in the past to get things working. > > Yours, > Linus Walleij > _______________________________________________ > devicetree-discuss mailing list > devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org > https://lists.ozlabs.org/listinfo/devicetree-discuss > >