From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Haojian Zhuang <haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v2 5/9] document: devicetree: bind pinconf with pin-single
Date: Mon, 22 Oct 2012 16:44:15 -0600 [thread overview]
Message-ID: <5085CC3F.30708@wwwdotorg.org> (raw)
In-Reply-To: <1350922139-3693-6-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 10/22/2012 10:08 AM, Haojian Zhuang wrote:
> Add comments with pinconf & gpio range in the document of
> pinctrl-single.
>
> Signed-off-by: Haojian Zhuang <haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/pinctrl/pinctrl-single.txt | 52 ++++++++++++++++++++
> arch/arm/boot/dts/pxa910.dtsi | 1 -
> 2 files changed, 52 insertions(+), 1 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
> index 2c81e45..6da2f13 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
> @@ -17,6 +17,36 @@ Optional properties:
> - pinctrl-single,bit-per-mux : boolean to indicate that one register controls
> more than one pin
>
> +- pinctrl-single,gpio-ranges : gpio range list
> +
> +- pinctrl-single,gpio : array with gpio range start, size & register
> + offset
> +
> +- pinctrl-single,gpio-func : gpio function value in the pinmux register
Some more explanation is needed here; some questions/comments:
1) Looking at the example, pinctrl-single,gpio-ranges is a property
within the main pinctrl node, whereas pinctrl-single,gpio and
pinctrl-single,gpio-func are properties within some other node. There's
no explanation of this in the binding description itself, only in the
example. Related to this, the documentation for
pinctrl-single,gpio-ranges doesn't say what it's a list of; it needs to
say that it's a list of phandles.
2) pinctrl-single,gpio is listed as optional. Presumably it's not; every
GPIO range node must have this property?
3) Why is pinctrl-single,gpio-func optional? Presumably you always need
to program the pinmux HW to select the GPIO function. Yet, the driver
code in an earlier patch seems to deliberately do nothing if this
property is missing. Shouldn't the DT parsing return an error instead?
4) I'm a little confused re: the data model. Is the idea that if
pinctrl-single,gpio-ranges is specified, then the node describes a
combined pin controller and GPIO HW? Are the pin IDs of the pin
controller expected to match the pin IDs of the GPIO HW? I'm left
wondering exactly which numbering space the values in
pinctrl-single,gpio are; do they describe the pin controller IDs that
this GPIO range describes, or do they describe the GPIO IDs that this
range describes and attempt to map them back to pin controller IDs?
Similarly, I'm not sure why there's a register offset here rather than
say a pin controller pin ID number. Shouldn't the property be a list of
<pin-controller-pin-ID GPIO-controller-GPIO-ID number-of-GPIOs>
> +- pinctrl-single,power-source-mask : mask of setting power source in
> + the pinmux register
> +
> +- pinctrl-single,power-source : value of setting power source field
> + in the pinmux register
> +
> +- pinctrl-single,bias-mask : mask of setting bias value in the pinmux
> + register
> +
> +- pinctrl-single,bias-disable : value of disabling bias in the pinmux
> + register
> +
> +- pinctrl-single,bias-pull-down : value of setting bias pull down in
> + the pinmux register
> +
> +- pinctrl-single,bias-pull-up : value of setting bias pull up in the
> + pinmux register
> +
> +- pinctrl-single,bias : value of setting bias in the pinmux register
> +
> +- pinctrl-single,input-schmitt-mask : mask of setting input schmitt
> + in the pinmux register
I suppose it's OK that a generic pin controller binding would use the
generic pin configuration config options. I'm still not convinced that
the semantics of generic pin control make sense. Maybe if they're just
arbitrary names for SoC-specific things it's fine though.
Do these patches expose /all/ generic pin configuration options? It
doesn't seem worth exposing only some of them and ignoring others.
> +/* third controller instance for pins in gpio domain */
> +pmx_gpio: pinmux@d401e000 {
> + compatible = "pinctrl-single";
> + reg = <0xd401e000 0x0330>;
> + #address-cells = <1>;
> + #size-cells = <0>;
#gpio-cells would be needed here for a GPIO controller.
> diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
> - pinctrl-single,gpio-mask = <7>;
I assume that's a mistake; the line shouldn't be removed in this
documentation patch?
next prev parent reply other threads:[~2012-10-22 22:44 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-22 16:08 [PATCH v2 0/9] support pinctrl single in arch pxa/mmp Haojian Zhuang
[not found] ` <1350922139-3693-1-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-22 16:08 ` [PATCH v2 1/9] ARM: mmp: select pinctrl driver Haojian Zhuang
[not found] ` <1350922139-3693-2-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-23 10:05 ` Linus Walleij
2012-10-22 16:08 ` [PATCH v2 2/9] pinctrl: single: support gpio request and free Haojian Zhuang
[not found] ` <1350922139-3693-3-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-22 20:28 ` Tony Lindgren
[not found] ` <20121022202805.GG4730-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2012-10-22 21:37 ` Tony Lindgren
[not found] ` <20121022213709.GL4730-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2012-10-29 1:55 ` Haojian Zhuang
2012-10-29 1:58 ` Haojian Zhuang
2012-10-22 16:08 ` [PATCH v2 3/9] pinctrl: single: support pinconf generic Haojian Zhuang
2012-10-22 16:08 ` [PATCH v2 4/9] ARM: dts: support pinctrl single in pxa910 Haojian Zhuang
2012-10-22 16:08 ` [PATCH v2 5/9] document: devicetree: bind pinconf with pin-single Haojian Zhuang
[not found] ` <1350922139-3693-6-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-22 22:44 ` Stephen Warren [this message]
[not found] ` <5085CC3F.30708-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-31 16:58 ` Haojian Zhuang
[not found] ` <CAN1soZy8xXGs8zEiZV0kV0dGVdXfZ9ogx83sFgPG76d0i8yH4A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-10-31 22:26 ` Stephen Warren
[not found] ` <5091A5AA.7000207-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-31 22:51 ` Haojian Zhuang
[not found] ` <CAN1soZyc8Kox__yOER82Oe5OtaLJWYAoMzgWGhEonTfdf11MqQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2012-11-01 0:25 ` Tony Lindgren
2012-10-22 16:08 ` [PATCH v2 6/9] tty: pxa: configure pin Haojian Zhuang
[not found] ` <1350922139-3693-7-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-23 10:07 ` Linus Walleij
2012-10-22 16:08 ` [PATCH v2 7/9] i2c: pxa: use devm_kzalloc Haojian Zhuang
2012-10-22 16:08 ` [PATCH v2 8/9] i2c: pxa: configure pinmux Haojian Zhuang
[not found] ` <1350922139-3693-9-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-23 10:07 ` Linus Walleij
2012-10-22 16:08 ` [PATCH v2 9/9] pinctrl: single: dump pinmux register value Haojian Zhuang
[not found] ` <1350922139-3693-10-git-send-email-haojian.zhuang-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-10-22 22:27 ` Tony Lindgren
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