[PATCH v2 0/4] gs101 max77759 enablement (DT)

[PATCH v2 0/4] gs101 max77759 enablement (DT)

[André Draszik]

Hi,

This series enables the recently merged Maxim max77759 driver and
updates the DT for the Google Pixel 6 / Pro (oriole / raven) boards
accordingly.

This gives us some extra GPIOs, and enables NVMEM which is used to
communicate the requested boot mode to the bootloader when doing a cold
reset.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
Changes in v2:
- rebase against next-20250516
- add dm-verity-device-corrupted to reboot-mode (nvmem & syscon)
- update commit messages slightly
- Link to v1: https://lore.kernel.org/r/20250306-b4-max77759-mfd-dts-v1-0-9fe8b0eb8123@linaro.org

---
André Draszik (4):
      arm64: defconfig: enable Maxim max77759 driver
      arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
      arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
      arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode

 .../boot/dts/exynos/google/gs101-pixel-common.dtsi | 76 ++++++++++++++++++++++
 arch/arm64/boot/dts/exynos/google/gs101.dtsi       |  1 +
 arch/arm64/configs/defconfig                       |  1 +
 3 files changed, 78 insertions(+)
---
base-commit: 8566fc3b96539e3235909d6bdda198e1282beaed
change-id: 20250306-b4-max77759-mfd-dts-fb88b6c6bd60

Best regards,
-- 
André Draszik <andre.draszik@linaro.org>

[PATCH v2 1/4] arm64: defconfig: enable Maxim max77759 driver

[André Draszik]

Enable the Maxim max77759 as this is used by the gs101-oriole and
gs101-raven (Google Pixel 6 and Pixel 6 Pro) boards,

The child devices' defaults are based on this MFD driver's state, so
this commit enables those implicitly as well.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 1f3fd474911b7ab1aa75dc72d42614f12b2dfc54..07e5e76edcbd3fcc4358d08663f51cca00acd49c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -769,6 +769,7 @@ CONFIG_MFD_EXYNOS_LPASS=m
 CONFIG_MFD_HI6421_PMIC=y
 CONFIG_MFD_HI655X_PMIC=y
 CONFIG_MFD_MAX77620=y
+CONFIG_MFD_MAX77759=m
 CONFIG_MFD_MT6360=y
 CONFIG_MFD_MT6397=y
 CONFIG_MFD_SPMI_PMIC=y

-- 
2.49.0.1151.ga128411c76-goog

Re: [PATCH v2 1/4] arm64: defconfig: enable Maxim max77759 driver

[Peter Griffin]

On Sat, 24 May 2025 at 06:21, André Draszik <andre.draszik@linaro.org> wrote:
>
> Enable the Maxim max77759 as this is used by the gs101-oriole and
> gs101-raven (Google Pixel 6 and Pixel 6 Pro) boards,
>
> The child devices' defaults are based on this MFD driver's state, so
> this commit enables those implicitly as well.
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>

[PATCH v2 2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

[André Draszik]

On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C
applications is used, which contains four functional blocks (at
distinct I2C addresses):
  * top (including GPIO & NVMEM)
  * charger
  * fuel gauge
  * TCPCi

This change adds the PMIC and the subnodes for the GPIO expander and
NVMEM, and defines the NVMEM layout.

The NVMEM layout is declared such that it matches downstream's
open-coded configuration [1].

Note:
The pinctrl nodes are kept sorted by the 'samsung,pins' property rather
than node name, as I think that makes it easier to look at and to add
new nodes unambiguously in the future. Its label is prefixed with 'if'
(for interface), because there are three PMICs in total in use on
Pixel 6 (Pro).

Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67 [1]
Signed-off-by: André Draszik <andre.draszik@linaro.org>

---
v2:
- update commit message slightly
---
 .../boot/dts/exynos/google/gs101-pixel-common.dtsi | 61 ++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
index d6ddcc13f7b20c6dfbe92e86abafe965870d0c78..de5c8d236b705505c0745827c5c6b67d94ba6227 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
@@ -188,6 +188,60 @@ usbc0_role_sw: endpoint {
 			};
 		};
 	};
+
+	pmic@66 {
+		compatible = "maxim,max77759";
+		reg = <0x66>;
+
+		pinctrl-0 = <&if_pmic_int>;
+		pinctrl-names = "default";
+		interrupts-extended = <&gpa8 3 IRQ_TYPE_LEVEL_LOW>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+
+		gpio {
+			compatible = "maxim,max77759-gpio";
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			/*
+			 * "Human-readable name [SIGNAL_LABEL]" where the
+			 * latter comes from the schematic
+			 */
+			gpio-line-names = "OTG boost [OTG_BOOST_EN]",
+					  "max20339 IRQ [MW_OVP_INT_L]";
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		nvmem-0 {
+			compatible = "maxim,max77759-nvmem";
+
+			nvmem-layout {
+				compatible = "fixed-layout";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				reboot-mode@0 {
+					reg = <0x0 0x4>;
+				};
+
+				boot-reason@4 {
+					reg = <0x4 0x4>;
+				};
+
+				shutdown-user-flag@8 {
+					reg = <0x8 0x1>;
+				};
+
+				rsoc@a {
+					reg = <0xa 0x2>;
+				};
+			};
+		};
+	};
 };
 
 &pinctrl_far_alive {
@@ -211,6 +265,13 @@ typec_int: typec-int-pins {
 		samsung,pin-pud = <GS101_PIN_PULL_UP>;
 		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
 	};
+
+	if_pmic_int: if-pmic-int-pins {
+		samsung,pins = "gpa8-3";
+		samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+		samsung,pin-pud = <GS101_PIN_PULL_UP>;
+		samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+	};
 };
 
 &pinctrl_gpio_alive {

-- 
2.49.0.1151.ga128411c76-goog

Re: [PATCH v2 2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

[Peter Griffin]

On Sat, 24 May 2025 at 06:21, André Draszik <andre.draszik@linaro.org> wrote:
>
> On Pixel 6 (and Pro), a MAX77759 companion PMIC for USB Type-C
> applications is used, which contains four functional blocks (at
> distinct I2C addresses):
>   * top (including GPIO & NVMEM)
>   * charger
>   * fuel gauge
>   * TCPCi
>
> This change adds the PMIC and the subnodes for the GPIO expander and
> NVMEM, and defines the NVMEM layout.
>
> The NVMEM layout is declared such that it matches downstream's
> open-coded configuration [1].
>
> Note:
> The pinctrl nodes are kept sorted by the 'samsung,pins' property rather
> than node name, as I think that makes it easier to look at and to add
> new nodes unambiguously in the future. Its label is prefixed with 'if'
> (for interface), because there are three PMICs in total in use on
> Pixel 6 (Pro).
>
> Link: https://android.googlesource.com/kernel/google-modules/bms/+/96e729a83817/max77759_maxq.c#67 [1]
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
>
> ---

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>

Re: [PATCH v2 2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

[Krzysztof Kozlowski]

On 24/05/2025 07:21, André Draszik wrote:
> +
> +		gpio {
> +			compatible = "maxim,max77759-gpio";
> +
> +			gpio-controller;
> +			#gpio-cells = <2>;
> +			/*
> +			 * "Human-readable name [SIGNAL_LABEL]" where the
> +			 * latter comes from the schematic
> +			 */
> +			gpio-line-names = "OTG boost [OTG_BOOST_EN]",
> +					  "max20339 IRQ [MW_OVP_INT_L]";
> +
> +			interrupt-controller;
> +			#interrupt-cells = <2>;
> +		};
> +
> +		nvmem-0 {

Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
does it, but why?

Best regards,
Krzysztof

Re: [PATCH v2 2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

[André Draszik]

Hi Krzysztof,

On Thu, 2025-06-26 at 21:49 +0200, Krzysztof Kozlowski wrote:
> On 24/05/2025 07:21, André Draszik wrote:
> > +
> > +		gpio {
> > +			compatible = "maxim,max77759-gpio";
> > +
> > +			gpio-controller;
> > +			#gpio-cells = <2>;
> > +			/*
> > +			 * "Human-readable name [SIGNAL_LABEL]" where the
> > +			 * latter comes from the schematic
> > +			 */
> > +			gpio-line-names = "OTG boost [OTG_BOOST_EN]",
> > +					  "max20339 IRQ [MW_OVP_INT_L]";
> > +
> > +			interrupt-controller;
> > +			#interrupt-cells = <2>;
> > +		};
> > +
> > +		nvmem-0 {
> 
> Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
> does it, but why?

'nvmem' is used/declared by nvmem-consumer.yaml as a phandle array
already so using just 'nvmem' fails validation:

Documentation/devicetree/bindings/mfd/maxim,max77759.example.dtb: pmic@66: nvmem: {'compatible': ['maxim,max77759-nvmem'], 'nvmem-
layout': {'compatible': ['fixed-layout'], '#address-cells': 1, '#size-cells': 1, 'reboot-mode@0': {'reg': [[0, 4]]}, 'boot-reason@4':
{'reg': [[4, 4]]}, 'shutdown-user-flag@8': {'reg': [[8, 1]]}, 'rsoc@10': {'reg': [[10, 2]]}}} is not of type 'array'
	from schema $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#

https://lore.kernel.org/all/20250226-max77759-mfd-v2-3-a65ebe2bc0a9@linaro.org/

Cheers,
Andre'

Re: [PATCH v2 2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

[Krzysztof Kozlowski]

On 27/06/2025 10:54, André Draszik wrote:
> Hi Krzysztof,
> 
> On Thu, 2025-06-26 at 21:49 +0200, Krzysztof Kozlowski wrote:
>> On 24/05/2025 07:21, André Draszik wrote:
>>> +
>>> +		gpio {
>>> +			compatible = "maxim,max77759-gpio";
>>> +
>>> +			gpio-controller;
>>> +			#gpio-cells = <2>;
>>> +			/*
>>> +			 * "Human-readable name [SIGNAL_LABEL]" where the
>>> +			 * latter comes from the schematic
>>> +			 */
>>> +			gpio-line-names = "OTG boost [OTG_BOOST_EN]",
>>> +					  "max20339 IRQ [MW_OVP_INT_L]";
>>> +
>>> +			interrupt-controller;
>>> +			#interrupt-cells = <2>;
>>> +		};
>>> +
>>> +		nvmem-0 {
>>
>> Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
>> does it, but why?
> 
> 'nvmem' is used/declared by nvmem-consumer.yaml as a phandle array
> already so using just 'nvmem' fails validation:
> 
> Documentation/devicetree/bindings/mfd/maxim,max77759.example.dtb: pmic@66: nvmem: {'compatible': ['maxim,max77759-nvmem'], 'nvmem-
> layout': {'compatible': ['fixed-layout'], '#address-cells': 1, '#size-cells': 1, 'reboot-mode@0': {'reg': [[0, 4]]}, 'boot-reason@4':
> {'reg': [[4, 4]]}, 'shutdown-user-flag@8': {'reg': [[8, 1]]}, 'rsoc@10': {'reg': [[10, 2]]}}} is not of type 'array'
> 	from schema $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#
> 
> https://lore.kernel.org/all/20250226-max77759-mfd-v2-3-a65ebe2bc0a9@linaro.org/
Heh, this should have been just folded into the parent as Rob suggested
during v2. Well, let's just merge it.

Best regards,
Krzysztof

Re: [PATCH v2 2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC

[André Draszik]

On Fri, 2025-06-27 at 11:12 +0200, Krzysztof Kozlowski wrote:
> On 27/06/2025 10:54, André Draszik wrote:
> > Hi Krzysztof,
> > 
> > On Thu, 2025-06-26 at 21:49 +0200, Krzysztof Kozlowski wrote:
> > > On 24/05/2025 07:21, André Draszik wrote:
> > > > +
> > > > +		gpio {
> > > > +			compatible = "maxim,max77759-gpio";
> > > > +
> > > > +			gpio-controller;
> > > > +			#gpio-cells = <2>;
> > > > +			/*
> > > > +			 * "Human-readable name [SIGNAL_LABEL]" where the
> > > > +			 * latter comes from the schematic
> > > > +			 */
> > > > +			gpio-line-names = "OTG boost [OTG_BOOST_EN]",
> > > > +					  "max20339 IRQ [MW_OVP_INT_L]";
> > > > +
> > > > +			interrupt-controller;
> > > > +			#interrupt-cells = <2>;
> > > > +		};
> > > > +
> > > > +		nvmem-0 {
> > > 
> > > Why is this called nvmem-0, not nvmem? Is there nvmem-1? I see binding
> > > does it, but why?
> > 
> > 'nvmem' is used/declared by nvmem-consumer.yaml as a phandle array
> > already so using just 'nvmem' fails validation:
> > 
> > Documentation/devicetree/bindings/mfd/maxim,max77759.example.dtb: pmic@66: nvmem: {'compatible': ['maxim,max77759-nvmem'], 'nvmem-
> > layout': {'compatible': ['fixed-layout'], '#address-cells': 1, '#size-cells': 1, 'reboot-mode@0': {'reg': [[0, 4]]},
> > 'boot-reason@4':
> > {'reg': [[4, 4]]}, 'shutdown-user-flag@8': {'reg': [[8, 1]]}, 'rsoc@10': {'reg': [[10, 2]]}}} is not of type 'array'
> > 	from schema $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#
> > 
> > https://lore.kernel.org/all/20250226-max77759-mfd-v2-3-a65ebe2bc0a9@linaro.org/
> Heh, this should have been just folded into the parent as Rob suggested
> during v2

AFAICS and remember, the other discussion was about gpio properties only,
nothing about nvmem. And I addressed all gpio related comments I believe.

> Well, let's just merge it.

Thanks Krzysztof.

Cheers,
Andre'

[PATCH v2 3/4] arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode

[André Draszik]

Add the 'nvmem-reboot-mode' which is used to communicate a requested
boot mode to the boot loader.

Signed-off-by: André Draszik <andre.draszik@linaro.org>

---
v2:
- add dm-verity-device-corrupted
- update commit message slightly
---
 .../boot/dts/exynos/google/gs101-pixel-common.dtsi      | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
index de5c8d236b705505c0745827c5c6b67d94ba6227..cd8e1b8a10b111190b984e104f749d04514d0449 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
@@ -60,6 +60,21 @@ button-power {
 		};
 	};
 
+	reboot-mode {
+		compatible = "nvmem-reboot-mode";
+		nvmem-cells = <&nvmem_reboot_mode>;
+		nvmem-cell-names = "reboot-mode";
+		mode-bootloader = <0x800000fc>;
+		mode-charge = <0x8000000a>;
+		mode-dm-verity-device-corrupted = <0x80000050>;
+		mode-fastboot = <0x800000fa>;
+		mode-reboot-ab-update = <0x80000052>;
+		mode-recovery = <0x800000ff>;
+		mode-rescue = <0x800000f9>;
+		mode-shutdown-thermal = <0x80000051>;
+		mode-shutdown-thermal-battery = <0x80000051>;
+	};
+
 	/* TODO: Remove this once PMIC is implemented  */
 	reg_placeholder: regulator-0 {
 		compatible = "regulator-fixed";
@@ -224,7 +239,7 @@ nvmem-layout {
 				#address-cells = <1>;
 				#size-cells = <1>;
 
-				reboot-mode@0 {
+				nvmem_reboot_mode: reboot-mode@0 {
 					reg = <0x0 0x4>;
 				};
 

-- 
2.49.0.1151.ga128411c76-goog

Re: [PATCH v2 3/4] arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode

[Peter Griffin]

On Sat, 24 May 2025 at 06:21, André Draszik <andre.draszik@linaro.org> wrote:
>
> Add the 'nvmem-reboot-mode' which is used to communicate a requested
> boot mode to the boot loader.
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
>
> ---
> v2:
> - add dm-verity-device-corrupted
> - update commit message slightly
> ---

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>

[PATCH v2 4/4] arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode

[André Draszik]

On gs101, the boot mode is stored both in a syscon register, and in
nvmem.

Add the dm-verity-device-corrupted reboot mode to the syscon-reboot-
based boot mode as well, as both (nvmem & syscon) modes should be in
sync.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 48c691fd0a3ae430b5d66b402610d23b72b144d7..88e491b2befc463789651a4cc7f3a658999ee808 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1426,6 +1426,7 @@ reboot-mode {
 				offset = <0x0810>; /* EXYNOS_PMU_SYSIP_DAT0 */
 				mode-bootloader = <0xfc>;
 				mode-charge = <0x0a>;
+				mode-dm-verity-device-corrupted = <0x50>;
 				mode-fastboot = <0xfa>;
 				mode-reboot-ab-update = <0x52>;
 				mode-recovery = <0xff>;

-- 
2.49.0.1151.ga128411c76-goog

Re: [PATCH v2 4/4] arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode

[Peter Griffin]

On Sat, 24 May 2025 at 06:21, André Draszik <andre.draszik@linaro.org> wrote:
>
> On gs101, the boot mode is stored both in a syscon register, and in
> nvmem.
>
> Add the dm-verity-device-corrupted reboot mode to the syscon-reboot-
> based boot mode as well, as both (nvmem & syscon) modes should be in
> sync.
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>

Re: [PATCH v2 0/4] gs101 max77759 enablement (DT)

[André Draszik]

On Sat, 2025-05-24 at 06:21 +0100, André Draszik wrote:
> Hi,
> 
> This series enables the recently merged Maxim max77759 driver and
> updates the DT for the Google Pixel 6 / Pro (oriole / raven) boards
> accordingly.
> 
> This gives us some extra GPIOs, and enables NVMEM which is used to
> communicate the requested boot mode to the bootloader when doing a cold
> reset.

Friendly ping.

Cheers,
Andre'

Re: [PATCH v2 0/4] gs101 max77759 enablement (DT)

[Krzysztof Kozlowski]

On 25/06/2025 19:25, André Draszik wrote:
> On Sat, 2025-05-24 at 06:21 +0100, André Draszik wrote:
>> Hi,
>>
>> This series enables the recently merged Maxim max77759 driver and
>> updates the DT for the Google Pixel 6 / Pro (oriole / raven) boards
>> accordingly.
>>
>> This gives us some extra GPIOs, and enables NVMEM which is used to
>> communicate the requested boot mode to the bootloader when doing a cold
>> reset.
> 
> Friendly ping.

Oh, I am really sorry, for some reason I thought it waits on
dependencies. I'll look at this today and hopefully merge it. Apologies
for delays.

Best regards,
Krzysztof

Re: [PATCH v2 0/4] gs101 max77759 enablement (DT)

[Krzysztof Kozlowski]

On Sat, 24 May 2025 06:21:27 +0100, André Draszik wrote:
> This series enables the recently merged Maxim max77759 driver and
> updates the DT for the Google Pixel 6 / Pro (oriole / raven) boards
> accordingly.
> 
> This gives us some extra GPIOs, and enables NVMEM which is used to
> communicate the requested boot mode to the bootloader when doing a cold
> reset.
> 
> [...]

Applied, thanks!

[1/4] arm64: defconfig: enable Maxim max77759 driver
      https://git.kernel.org/krzk/linux/c/ffdf3c776914f89dfb452e2a572e5bb7e89ccad8
[2/4] arm64: dts: exynos: gs101-pixel-common: add Maxim MAX77759 PMIC
      https://git.kernel.org/krzk/linux/c/8deaddf13538d68f4d7bd14a65dcd511ec0aba4e
[3/4] arm64: dts: exynos: gs101-pixel-common: add nvmem-reboot-mode
      https://git.kernel.org/krzk/linux/c/4292d18257c4a296f4b9e56a83ae22fecb63e727
[4/4] arm64: dts: exynos: gs101: add dm-verity-device-corrupted syscon-reboot-mode
      https://git.kernel.org/krzk/linux/c/17a3657e09a326b3417a46ae0044163f2c9c03ed

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>