public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: Arnd Bergmann <arnd@arndb.de>
To: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	grygorii.strashko@ti.com, linux@arm.linux.org.uk,
	linux-doc@vger.kernel.org, pawel.moll@arm.com,
	ijc+devicetree@hellion.org.uk, dbaryshkov@gmail.com,
	rdunlap@infradead.org, sboyd@codeaurora.org,
	linux-kernel@vger.kernel.org, olof@lixom.net, robh+dt@kernel.org,
	linux-arm-kernel@lists.infradead.org, galak@codeaurora.org,
	grant.likely@linaro.org, Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>,
	dwmw2@infradead.org, w-kwok2@ti.com
Subject: Re: [Patch v3 0/5] Introduce keystone reset driver
Date: Mon, 19 May 2014 19:47:13 +0200	[thread overview]
Message-ID: <5095812.b6DgWAxYzH@wuerfel> (raw)
In-Reply-To: <537A1E2C.8040102@ti.com>

On Monday 19 May 2014 11:07:24 Santosh Shilimkar wrote:
> On Monday 19 May 2014 06:25 AM, Ivan Khoronzhuk wrote:
> > These patches introduce keystone reset driver.
> > 
> > The keystone SoC can be rebooted in several ways. By external reset
> > pin, by soft and by watchdogs. This driver allows software reset and reset
> > by one of the watchdogs. Also added opportunity to set soft/hard reset type.
> > 
> > Based on v3.15-rc5
> > 
> Arnd,
> Can I have have your ack/reviewed-by please since you did gave few comments
> on previous version.

Sorry for not getting back to you earlier on this topic.

> On 04/14/2014 09:44 PM, Arnd Bergmann wrote:
> > On Monday 14 April 2014 20:41:20 Ivan Khoronzhuk wrote:
> >> +Optional properties:
> >> +
> >> +- ti,soft-reset:       Boolean option indicating soft reset.
> >> +                       By default hard reset is used.
> >> +
> >> +- ti,wdt_list:         WDT list that can cause SoC reset.
> >> +                       The list in format: <0>, <2>;
> >> +                       Begins from 0 to 3, as keystone can contain up
> >> +                       to 4 SoC reset watchdogs.
> > 
> > This looks like your binding just describes a subset of the
> > watchdog timer registers. If so, don't do a standalone reset
> 
> The registers are not a subset of watchdog hardware it's SoC specific future
> controlled by SoC specific registers (bootregs and PLL regs).
> 
> For watchog IP setup, the Keystone uses the watchdog driver common with
> other
> SoCs -- davinci_watchdog that is not depend on other SoC settings like
> this driver does.
> 
> The Keystone SoCs have separate registers to tune Keystone2 reset
> functionality
> by configuring Reset multiplexer &  PLL. And it tunes not only watchdog
> usage.
> The keystone SoC can be rebooted in several ways. By external reset pin,
> by soft and
> by watchdogs. This driver allows software reset or reset by one of the
> watchdogs
> (and other settings) independently on watchdog driver settings. This is
> job of reset driver.

It sounds like you use a syscon area in the reset driver. This is not
uncommon, but it means you should probably have a generic node for
the SoC specific registers that contains all of them at once and
exports them as a regmap using the drivers/mfd/syscon.c driver.

	Arnd

  reply	other threads:[~2014-05-19 17:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-19 10:25 [Patch v3 0/5] Introduce keystone reset driver Ivan Khoronzhuk
2014-05-19 10:25 ` [Patch v3 1/5] Power: reset: keystone-reset: introduce " Ivan Khoronzhuk
2014-05-19 10:25 ` [Patch v3 2/5] Power: reset: add bindings for " Ivan Khoronzhuk
2014-05-19 10:25 ` [Patch v3 3/5] ARM: keystone: remove redundant reset stuff Ivan Khoronzhuk
2014-05-19 10:25 ` [Patch v3 4/5] ARM: dts: keystone: update reset node to work with reset driver Ivan Khoronzhuk
2014-05-19 10:25 ` [Patch v3 5/5] ARM: keystone: enable reset driver support Ivan Khoronzhuk
2014-05-19 15:07 ` [Patch v3 0/5] Introduce keystone reset driver Santosh Shilimkar
2014-05-19 17:47   ` Arnd Bergmann [this message]
2014-05-20 13:16     ` Ivan Khoronzhuk
     [not found]       ` <537B5598.8070603-l0cyMroinI0@public.gmane.org>
2014-05-20 13:44         ` Arnd Bergmann
2014-05-20 13:49           ` Santosh Shilimkar
2014-05-20 18:35             ` Ivan Khoronzhuk
     [not found]               ` <537BA06B.5060200-l0cyMroinI0@public.gmane.org>
2014-05-20 19:27                 ` Arnd Bergmann
2014-05-21 14:28                   ` Ivan Khoronzhuk

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5095812.b6DgWAxYzH@wuerfel \
    --to=arnd@arndb.de \
    --cc=dbaryshkov@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dwmw2@infradead.org \
    --cc=galak@codeaurora.org \
    --cc=grant.likely@linaro.org \
    --cc=grygorii.strashko@ti.com \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=ivan.khoronzhuk@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=mark.rutland@arm.com \
    --cc=olof@lixom.net \
    --cc=pawel.moll@arm.com \
    --cc=rdunlap@infradead.org \
    --cc=robh+dt@kernel.org \
    --cc=santosh.shilimkar@ti.com \
    --cc=sboyd@codeaurora.org \
    --cc=w-kwok2@ti.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox