From: Jon Hunter <jon-hunter@ti.com>
To: Daniel Mack <zonque@gmail.com>, Tony Lindgren <tony@atomide.com>
Cc: x0148406@ti.com, devicetree-discuss@lists.ozlabs.org,
nsekhar@ti.com, rob.herring@calxeda.com, avinashphilip@ti.com,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 4/5] ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs
Date: Thu, 29 Nov 2012 14:32:55 -0600 [thread overview]
Message-ID: <50B7C677.7090504@ti.com> (raw)
In-Reply-To: <50B7BE9C.6040506@ti.com>
On 11/29/2012 01:59 PM, Jon Hunter wrote:
>
> On 11/29/2012 10:01 AM, Daniel Mack wrote:
>> The am33xx is capable of handling bch error correction modes, so
>> enable that feature in the driver.
>>
>> Signed-off-by: Daniel Mack <zonque@gmail.com>
>> ---
>> arch/arm/mach-omap2/gpmc-nand.c | 9 +++++----
>> 1 file changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
>> index f9f23a2..c8a72ba 100644
>> --- a/arch/arm/mach-omap2/gpmc-nand.c
>> +++ b/arch/arm/mach-omap2/gpmc-nand.c
>> @@ -92,17 +92,18 @@ static int omap2_nand_gpmc_retime(
>> static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
>> {
>> /* support only OMAP3 class */
>> - if (!cpu_is_omap34xx()) {
>> + if (!cpu_is_omap34xx() && !soc_is_am33xx()) {
>> pr_err("BCH ecc is not supported on this CPU\n");
>> return 0;
>> }
>>
>> /*
>> - * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1.
>> - * Other chips may be added if confirmed to work.
>> + * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
>> + * and AM33xx derivates. Other chips may be added if confirmed to work.
>> */
>> if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
>> - (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0))) {
>> + (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) &&
>> + (!soc_is_am33xx())) {
>> pr_err("BCH 4-bit mode is not supported on this CPU\n");
>> return 0;
>> }
>
> Sorry I should have seen this earlier. Ideally, this type of thing
> should be reflected by the device-tree/platform-data and we should get
> away from these cpu_is_xxxx macros for hardware features (where we can).
> Furthermore, we need to avoid including plat-omap/gpmc.h in drivers for
> the single zImage work (I see the omap nand driver is including gpmc.h).
>
> Tony, should this be addressed now or can we live this for the minute
> and fix-up later?
Actually, I see that you do read the ecc mode from DT, so is this really
needed? It would be good to eliminate this.
Cheers
Jon
next prev parent reply other threads:[~2012-11-29 20:32 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-29 16:01 [PATCH v6 0/5] OMAP GPMC DT bindings Daniel Mack
2012-11-29 16:01 ` [PATCH v6 1/5] ARM: OMAP: gpmc: don't create devices from initcall on DT Daniel Mack
[not found] ` <1354204892-22762-2-git-send-email-zonque-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-11-29 18:00 ` Jon Hunter
2012-11-29 16:01 ` [PATCH v6 2/5] mtd: omap-nand: pass device_node in platform data Daniel Mack
2012-11-29 16:01 ` [PATCH v6 3/5] ARM: OMAP: gpmc-nand: drop __init annotation Daniel Mack
2012-11-29 16:01 ` [PATCH v6 4/5] ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs Daniel Mack
2012-11-29 19:59 ` Jon Hunter
2012-11-29 20:32 ` Jon Hunter [this message]
2012-11-29 20:42 ` Daniel Mack
2012-11-29 20:59 ` Jon Hunter
2012-12-05 13:04 ` Daniel Mack
2012-12-05 17:19 ` Tony Lindgren
2012-12-05 17:26 ` Daniel Mack
2012-12-05 17:41 ` Tony Lindgren
2012-12-05 18:19 ` Jon Hunter
2012-12-05 18:33 ` Tony Lindgren
2012-12-05 18:40 ` Daniel Mack
2012-12-05 19:11 ` Jon Hunter
2012-12-05 18:43 ` Daniel Mack
2012-11-29 16:01 ` [PATCH v6 5/5] ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND Daniel Mack
[not found] ` <1354204892-22762-6-git-send-email-zonque-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2012-11-29 20:28 ` Jon Hunter
2012-11-29 20:56 ` Daniel Mack
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