From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: alan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
jslaby-AlSwsSmVLrQ@public.gmane.org,
grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org,
rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
wmb-D5eQfiDGL7eakBO8gow8eQ@public.gmane.org
Subject: Re: [PATCH V4 RESEND] serial: tegra: add serial driver
Date: Tue, 08 Jan 2013 15:23:46 -0700 [thread overview]
Message-ID: <50EC9C72.7040002@wwwdotorg.org> (raw)
In-Reply-To: <1357642664-10816-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 01/08/2013 03:57 AM, Laxman Dewangan wrote:
> NVIDIA's Tegra has multiple UART controller which supports:
> - APB DMA based controller fifo read/write.
> - End Of Data interrupt in incoming data to know whether end
> of frame achieve or not.
> - HW controlled RTS and CTS flow control to reduce SW overhead.
>
> Add serial driver to use all above feature.
>
> Signed-off-by: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> Acked-by: Alan Cox <alan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
The DT binding part of this patch,
Reviewed-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
prev parent reply other threads:[~2013-01-08 22:23 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-08 10:57 [PATCH V4 RESEND] serial: tegra: add serial driver Laxman Dewangan
[not found] ` <1357642664-10816-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-01-08 22:23 ` Stephen Warren [this message]
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