From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH V4 RESEND] serial: tegra: add serial driver Date: Tue, 08 Jan 2013 15:23:46 -0700 Message-ID: <50EC9C72.7040002@wwwdotorg.org> References: <1357642664-10816-1-git-send-email-ldewangan@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1357642664-10816-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Laxman Dewangan Cc: alan-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, jslaby-AlSwsSmVLrQ@public.gmane.org, grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org, rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, wmb-D5eQfiDGL7eakBO8gow8eQ@public.gmane.org List-Id: devicetree@vger.kernel.org On 01/08/2013 03:57 AM, Laxman Dewangan wrote: > NVIDIA's Tegra has multiple UART controller which supports: > - APB DMA based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - HW controlled RTS and CTS flow control to reduce SW overhead. > > Add serial driver to use all above feature. > > Signed-off-by: Laxman Dewangan > Acked-by: Alan Cox The DT binding part of this patch, Reviewed-by: Stephen Warren