Re: [PATCH] of_i2c: I2C child node 10-bit client addressing

[Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]

FYI, re:

> https://lists.ozlabs.org/pipermail/devicetree-discuss/2012-November/022645.html

I know that was a long time ago, but I was searching for information on
which chips supported 10-bit I2C addresses, and found a partial answer
to the question:

Grant Likely wrote:
> Is it possible for a device to have an address that fits in the first 7
> bits, but still requires 10 bit address transactions?

The following chip (link below) certainly supports a 10-bit I2C address
with the top-most 3 bits set to 0. Now, it does also respond to a 7-bit
I2C address of the same value, so this perhaps isn't quite an exact
answer to Grant's question. However, it does indicate to me that we
shouldn't determine whether to use 7- or 10-bit addresses solely from
the set bits in the I2C address; a separate property or flag bit in the
address field would be better, I think.

http://www.ti.com/lit/ds/snvs839/snvs839.pdf

Quoting it:

> 7-BIT and 10-BIT ADDRESSING MODES
>
> The LM8330 supports both the 7-bit and 10-bit addressing modes as defined in the NXP (Philips) I 2 C
> Specification UM10204 rev 0.3 from 2007. The default 7-bit slave address is 0x88, and the default 10-bit slave
> address is 0x088. NOTE: The upper three address bits in 10-bit mode are hard tied to 0.