* [PATCH v8 0/2] add VCP mailbox driver
@ 2025-10-10 9:15 Jjian Zhou
2025-10-10 9:15 ` [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document Jjian Zhou
2025-10-10 9:15 ` [PATCH v8 2/2] mailbox: mediatek: Add mtk-vcp-mailbox driver Jjian Zhou
0 siblings, 2 replies; 6+ messages in thread
From: Jjian Zhou @ 2025-10-10 9:15 UTC (permalink / raw)
To: Jassi Brar, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jjian Zhou,
Chen-Yu Tsai
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group, Jjian Zhou
Hi everyone,
This is v8 of my VCP mailbox driver.
Changes since v8:
- Rebase onto next-20251008 and fixed build breaks.
Changes since v7:
- mtk-vcp-mailbox.c:
- Change type u32 to u16.
- Change BIT(ipi_info->index) to if.
- Put the platform_set_drvdata between "of_device_get_match_data"
and "platform_get_irq".
- mtk-vcp-mailbox.h
- Modify the definition to MTK_VCP_MBOX_SLOT_MAX_SIZE.
Changes since v6:
- mtk-vcp-mailbox.c:
- Replace mtk_vcp_mbox_priv with mtk_vcp_mbox.
- Move mbox_controller to the first member.
- Define "struct mbox_chan chan"; Remove allocate one during the probe.
- Remove API get_mtk_vcp_mbox_priv.
- Pass the private data since there's only one mailbox.
- Modify mtk_vcp_mbox_xlate "return &mbox->chans[0]".
Changes since v5:
- binding:
- Patch 1 fix 'make dt_binding_check' errors.
- Link to v5
https://patchwork.kernel.org/project/linux-mediatek/patch/20250822021217.1598-2-jjian.zhou@mediatek.com/
Changes since v4:
- binding:
- Match the binding file name and compatible.
- mtk-vcp-mailbox.c:
- Drop 'dev_dbg(dev, "MTK VCP mailbox initialized\n")'.
- Since the reviewer hopes to combine the VCP IPC driver and
the VCP driver for a unified review, the original three patches
have been split into two parts: the VCP mailbox driver and
the binding remain together, while the VCP IPC driver is merged
with the VCP driver and submitted as one.
- Link to v4
https://lore.kernel.org/all/20250820094545.23821-1-jjian.zhou@mediatek.com/
Changes since v3:
- binding:
- Remove unused lable '|' and 'vcp_mailbox0'.
- Link to v3
https://lore.kernel.org/all/20250317110331.2776-1-jjian.zhou@mediatek.com/
Changes since v1:
- Link to v1
https://lore.kernel.org/all/20250305082047.15746-1-jjian.zhou@mediatek.com/
In the v2 version, there is ongoing discussion about whether the VCP's
IPC should use mailbox or rpmsg. To prevent the discussion records
from being lost, the previous discussion link is attached.
https://lore.kernel.org/all/CAGXv+5FXqZb_v2dQNgCKbFpJrLhbVk3f0sWrrMCVk3jaWwoBqA@mail.gmail.com/
Jjian Zhou (2):
dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox
document
mailbox: mediatek: Add mtk-vcp-mailbox driver
.../mailbox/mediatek,mt8196-vcp-mbox.yaml | 49 +++++
drivers/mailbox/Kconfig | 9 +
drivers/mailbox/Makefile | 2 +
drivers/mailbox/mtk-vcp-mailbox.c | 170 ++++++++++++++++++
include/linux/mailbox/mtk-vcp-mailbox.h | 32 ++++
5 files changed, 262 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
create mode 100755 drivers/mailbox/mtk-vcp-mailbox.c
create mode 100755 include/linux/mailbox/mtk-vcp-mailbox.h
--
2.45.2
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document
2025-10-10 9:15 [PATCH v8 0/2] add VCP mailbox driver Jjian Zhou
@ 2025-10-10 9:15 ` Jjian Zhou
2025-10-11 6:51 ` Jjian Zhou (周建)
2025-10-10 9:15 ` [PATCH v8 2/2] mailbox: mediatek: Add mtk-vcp-mailbox driver Jjian Zhou
1 sibling, 1 reply; 6+ messages in thread
From: Jjian Zhou @ 2025-10-10 9:15 UTC (permalink / raw)
To: Jassi Brar, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jjian Zhou,
Chen-Yu Tsai
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group, Jjian Zhou,
Krzysztof Kozlowski
The MTK VCP mailbox enables the SoC to communicate with the VCP by passing
messages through 64 32-bit wide registers. It has 32 interrupt vectors in
either direction for signalling purposes.
This adds a binding for Mediatek VCP mailbox.
Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
---
.../mailbox/mediatek,mt8196-vcp-mbox.yaml | 49 +++++++++++++++++++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
new file mode 100644
index 000000000000..7b1c5165e64e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-vcp-mbox.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek Video Companion Processor (VCP) mailbox
+
+maintainers:
+ - Jjian Zhou <Jjian.Zhou@mediatek.com>
+
+description:
+ The MTK VCP mailbox enables the SoC to communicate with the VCP by passing
+ messages through 64 32-bit wide registers. It has 32 interrupt vectors in
+ either direction for signalling purposes.
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt8196-vcp-mbox
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#mbox-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#mbox-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ mailbox@31b80000 {
+ compatible = "mediatek,mt8196-vcp-mbox";
+ reg = <0x31b80000 0x1000>;
+ interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <0>;
+ };
--
2.45.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v8 2/2] mailbox: mediatek: Add mtk-vcp-mailbox driver
2025-10-10 9:15 [PATCH v8 0/2] add VCP mailbox driver Jjian Zhou
2025-10-10 9:15 ` [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document Jjian Zhou
@ 2025-10-10 9:15 ` Jjian Zhou
1 sibling, 0 replies; 6+ messages in thread
From: Jjian Zhou @ 2025-10-10 9:15 UTC (permalink / raw)
To: Jassi Brar, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Matthias Brugger, AngeloGioacchino Del Regno, Jjian Zhou,
Chen-Yu Tsai
Cc: linux-kernel, devicetree, linux-arm-kernel, linux-mediatek,
Project_Global_Chrome_Upstream_Group, Jjian Zhou
Add mtk-vcp-mailbox driver to support the communication with
VCP remote microprocessor.
Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/mailbox/Kconfig | 9 ++
drivers/mailbox/Makefile | 2 +
drivers/mailbox/mtk-vcp-mailbox.c | 170 ++++++++++++++++++++++++
include/linux/mailbox/mtk-vcp-mailbox.h | 32 +++++
4 files changed, 213 insertions(+)
create mode 100644 drivers/mailbox/mtk-vcp-mailbox.c
create mode 100644 include/linux/mailbox/mtk-vcp-mailbox.h
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 29f16f220384..d7f8db25f3b3 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -304,6 +304,15 @@ config MTK_GPUEB_MBOX
Say Y or m here if you want to support the MT8196 SoC in your kernel
build.
+config MTK_VCP_MBOX
+ tristate "MediaTek VCP Mailbox Support"
+ depends on ARCH_MEDIATEK || COMPILE_TEST
+ help
+ Say yes here to add support for the MediaTek VCP mailbox driver.
+ The mailbox implementation provides access from the application
+ processor to Video Companion Processor Unit.
+ If unsure say N.
+
config ZYNQMP_IPI_MBOX
tristate "Xilinx ZynqMP IPI Mailbox"
depends on ARCH_ZYNQMP && OF
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 81820a4f5528..944d8ea39f34 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -65,6 +65,8 @@ obj-$(CONFIG_MTK_CMDQ_MBOX) += mtk-cmdq-mailbox.o
obj-$(CONFIG_MTK_GPUEB_MBOX) += mtk-gpueb-mailbox.o
+obj-$(CONFIG_MTK_VCP_MBOX) += mtk-vcp-mailbox.o
+
obj-$(CONFIG_ZYNQMP_IPI_MBOX) += zynqmp-ipi-mailbox.o
obj-$(CONFIG_SUN6I_MSGBOX) += sun6i-msgbox.o
diff --git a/drivers/mailbox/mtk-vcp-mailbox.c b/drivers/mailbox/mtk-vcp-mailbox.c
new file mode 100644
index 000000000000..cedad575528f
--- /dev/null
+++ b/drivers/mailbox/mtk-vcp-mailbox.c
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2025 MediaTek Corporation. All rights reserved.
+ * Author: Jjian Zhou <jjian.zhou.@mediatek.com>
+ */
+
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/mailbox_controller.h>
+#include <linux/mailbox/mtk-vcp-mailbox.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+struct mtk_vcp_mbox {
+ struct mbox_controller mbox;
+ void __iomem *base;
+ struct device *dev;
+ const struct mtk_vcp_mbox_cfg *cfg;
+ struct mtk_ipi_info ipi_recv;
+ struct mbox_chan chans;
+};
+
+struct mtk_vcp_mbox_cfg {
+ u16 set_in;
+ u16 clr_out;
+};
+
+static irqreturn_t mtk_vcp_mbox_irq_thread(int irq, void *data)
+{
+ struct mtk_vcp_mbox *priv = data;
+
+ /* get irq status */
+ priv->ipi_recv.irq_status = readl(priv->base + priv->cfg->clr_out);
+
+ __ioread32_copy(priv->ipi_recv.msg, priv->base,
+ MTK_VCP_MBOX_SLOT_MAX_SIZE / 4);
+
+ mbox_chan_received_data(&priv->chans, &priv->ipi_recv);
+
+ /* clear irq status */
+ writel(priv->ipi_recv.irq_status, priv->base + priv->cfg->clr_out);
+
+ return IRQ_HANDLED;
+}
+
+static struct mbox_chan *mtk_vcp_mbox_xlate(struct mbox_controller *mbox,
+ const struct of_phandle_args *sp)
+{
+ if (sp->args_count)
+ return NULL;
+
+ return &mbox->chans[0];
+}
+
+static int mtk_vcp_mbox_send_data(struct mbox_chan *chan, void *data)
+{
+ struct mtk_vcp_mbox *priv = chan->con_priv;
+ struct mtk_ipi_info *ipi_info = data;
+ u32 status;
+
+ if (!ipi_info->msg) {
+ dev_err(priv->dev, "msg buffer is NULL.\n");
+ return -EINVAL;
+ }
+
+ status = readl(priv->base + priv->cfg->set_in);
+ if (status & BIT(ipi_info->index)) {
+ dev_warn(priv->dev, "mailbox IPI %d is busy.\n", ipi_info->id);
+ return -EBUSY;
+ }
+
+ if (ipi_info->slot_ofs + ipi_info->len > MTK_VCP_MBOX_SLOT_MAX_SIZE)
+ return -EINVAL;
+ __iowrite32_copy(priv->base + ipi_info->slot_ofs, ipi_info->msg,
+ ipi_info->len);
+
+ writel(BIT(ipi_info->index), priv->base + priv->cfg->set_in);
+
+ return 0;
+}
+
+static bool mtk_vcp_mbox_last_tx_done(struct mbox_chan *chan)
+{
+ struct mtk_ipi_info *ipi_info = chan->active_req;
+ struct mtk_vcp_mbox *priv = chan->con_priv;
+
+ return !(readl(priv->base + priv->cfg->set_in) & BIT(ipi_info->index));
+}
+
+static const struct mbox_chan_ops mtk_vcp_mbox_chan_ops = {
+ .send_data = mtk_vcp_mbox_send_data,
+ .last_tx_done = mtk_vcp_mbox_last_tx_done,
+};
+
+static int mtk_vcp_mbox_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct mtk_vcp_mbox *priv;
+ struct mbox_controller *mbox;
+ int ret, irq;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->dev = dev;
+ priv->chans.con_priv = priv;
+ mbox = &priv->mbox;
+ mbox->dev = dev;
+ mbox->ops = &mtk_vcp_mbox_chan_ops;
+ mbox->txdone_irq = false;
+ mbox->txdone_poll = true;
+ mbox->of_xlate = mtk_vcp_mbox_xlate;
+ mbox->num_chans = 1;
+ mbox->chans = &priv->chans;
+
+ priv->ipi_recv.msg = devm_kzalloc(dev, MTK_VCP_MBOX_SLOT_MAX_SIZE,
+ GFP_KERNEL);
+ if (!priv->ipi_recv.msg)
+ return -ENOMEM;
+
+ priv->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ priv->cfg = of_device_get_match_data(dev);
+ if (!priv->cfg)
+ return -EINVAL;
+
+ platform_set_drvdata(pdev, priv);
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = devm_request_threaded_irq(dev, irq, NULL,
+ mtk_vcp_mbox_irq_thread, IRQF_ONESHOT,
+ dev_name(dev), priv);
+ if (ret < 0)
+ return ret;
+
+ return devm_mbox_controller_register(dev, &priv->mbox);
+}
+
+static const struct mtk_vcp_mbox_cfg mt8196_cfg = {
+ .set_in = 0x100,
+ .clr_out = 0x10c,
+};
+
+static const struct of_device_id mtk_vcp_mbox_of_match[] = {
+ { .compatible = "mediatek,mt8196-vcp-mbox", .data = &mt8196_cfg },
+ {},
+};
+MODULE_DEVICE_TABLE(of, mtk_vcp_mbox_of_match);
+
+static struct platform_driver mtk_vcp_mbox_driver = {
+ .probe = mtk_vcp_mbox_probe,
+ .driver = {
+ .name = "mtk_vcp_mbox",
+ .of_match_table = mtk_vcp_mbox_of_match,
+ },
+};
+module_platform_driver(mtk_vcp_mbox_driver);
+
+MODULE_AUTHOR("Jjian Zhou <jjian.zhou@mediatek.com>");
+MODULE_DESCRIPTION("MTK VCP Mailbox Controller");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/mailbox/mtk-vcp-mailbox.h b/include/linux/mailbox/mtk-vcp-mailbox.h
new file mode 100644
index 000000000000..16e59d6780a7
--- /dev/null
+++ b/include/linux/mailbox/mtk-vcp-mailbox.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2025 MediaTek Inc.
+ */
+
+#ifndef __MTK_VCP_MAILBOX_H__
+#define __MTK_VCP_MAILBOX_H__
+
+#define MTK_VCP_MBOX_SLOT_MAX_SIZE 0x100 /* mbox max slot size */
+
+/**
+ * struct mtk_ipi_info - mailbox message info for mtk-vcp-mailbox
+ * @msg: The share buffer between IPC and mailbox driver
+ * @len: Message length
+ * @id: This is for identification purposes and not actually used
+ * by the mailbox hardware.
+ * @index: The signal number of the mailbox message.
+ * @slot_ofs: Data slot offset.
+ * @irq_status: Captures incoming signals for the RX path.
+ *
+ * It is used between IPC with mailbox driver.
+ */
+struct mtk_ipi_info {
+ void *msg;
+ u32 len;
+ u32 id;
+ u32 index;
+ u32 slot_ofs;
+ u32 irq_status;
+};
+
+#endif
--
2.45.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document
2025-10-10 9:15 ` [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document Jjian Zhou
@ 2025-10-11 6:51 ` Jjian Zhou (周建)
2025-10-12 2:59 ` Krzysztof Kozlowski
0 siblings, 1 reply; 6+ messages in thread
From: Jjian Zhou (周建) @ 2025-10-11 6:51 UTC (permalink / raw)
To: jassisinghbrar@gmail.com, robh@kernel.org, krzk+dt@kernel.org,
wenst@chromium.org, conor+dt@kernel.org,
AngeloGioacchino Del Regno, matthias.bgg@gmail.com
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
krzysztof.kozlowski@linaro.org, devicetree@vger.kernel.org,
Project_Global_Chrome_Upstream_Group
On Fri, 2025-10-10 at 17:15 +0800, Jjian Zhou wrote:
> The MTK VCP mailbox enables the SoC to communicate with the VCP by
> passing
> messages through 64 32-bit wide registers. It has 32 interrupt
> vectors in
> either direction for signalling purposes.
>
> This adds a binding for Mediatek VCP mailbox.
>
> Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
I forgot to add "AngeloGioacchino Del Regno <
angelogioacchino.delregno@collabora.com>".
Do I need to resubmit it?
> ---
> .../mailbox/mediatek,mt8196-vcp-mbox.yaml | 49
> +++++++++++++++++++
> 1 file changed, 49 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-
> mbox.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-
> mbox.yaml
> b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-
> mbox.yaml
> new file mode 100644
> index 000000000000..7b1c5165e64e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-
> mbox.yaml
> @@ -0,0 +1,49 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/mailbox/mediatek,mt8196-vcp-mbox.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek Video Companion Processor (VCP) mailbox
> +
> +maintainers:
> + - Jjian Zhou <Jjian.Zhou@mediatek.com>
> +
> +description:
> + The MTK VCP mailbox enables the SoC to communicate with the VCP by
> passing
> + messages through 64 32-bit wide registers. It has 32 interrupt
> vectors in
> + either direction for signalling purposes.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8196-vcp-mbox
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + "#mbox-cells":
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - "#mbox-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + mailbox@31b80000 {
> + compatible = "mediatek,mt8196-vcp-mbox";
> + reg = <0x31b80000 0x1000>;
> + interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH 0>;
> + #mbox-cells = <0>;
> + };
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document
2025-10-11 6:51 ` Jjian Zhou (周建)
@ 2025-10-12 2:59 ` Krzysztof Kozlowski
2025-10-13 5:48 ` Jjian Zhou (周建)
0 siblings, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-12 2:59 UTC (permalink / raw)
To: Jjian Zhou (周建), jassisinghbrar@gmail.com,
robh@kernel.org, krzk+dt@kernel.org, wenst@chromium.org,
conor+dt@kernel.org, AngeloGioacchino Del Regno,
matthias.bgg@gmail.com
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
krzysztof.kozlowski@linaro.org, devicetree@vger.kernel.org,
Project_Global_Chrome_Upstream_Group
On 11/10/2025 08:51, Jjian Zhou (周建) wrote:
> On Fri, 2025-10-10 at 17:15 +0800, Jjian Zhou wrote:
>> The MTK VCP mailbox enables the SoC to communicate with the VCP by
>> passing
>> messages through 64 32-bit wide registers. It has 32 interrupt
>> vectors in
>> either direction for signalling purposes.
>>
>> This adds a binding for Mediatek VCP mailbox.
>>
>> Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> I forgot to add "AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>".
> Do I need to resubmit it?
Yes.
You also should use b4, so you won't be making such mistakes.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document
2025-10-12 2:59 ` Krzysztof Kozlowski
@ 2025-10-13 5:48 ` Jjian Zhou (周建)
0 siblings, 0 replies; 6+ messages in thread
From: Jjian Zhou (周建) @ 2025-10-13 5:48 UTC (permalink / raw)
To: wenst@chromium.org, krzk@kernel.org, conor+dt@kernel.org,
robh@kernel.org, matthias.bgg@gmail.com, jassisinghbrar@gmail.com,
krzk+dt@kernel.org, AngeloGioacchino Del Regno
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
krzysztof.kozlowski@linaro.org, devicetree@vger.kernel.org,
Project_Global_Chrome_Upstream_Group
On Sun, 2025-10-12 at 04:59 +0200, Krzysztof Kozlowski wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
>
> On 11/10/2025 08:51, Jjian Zhou (周建) wrote:
> > On Fri, 2025-10-10 at 17:15 +0800, Jjian Zhou wrote:
> > > The MTK VCP mailbox enables the SoC to communicate with the VCP
> > > by
> > > passing
> > > messages through 64 32-bit wide registers. It has 32 interrupt
> > > vectors in
> > > either direction for signalling purposes.
> > >
> > > This adds a binding for Mediatek VCP mailbox.
> > >
> > > Signed-off-by: Jjian Zhou <jjian.zhou@mediatek.com>
> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> >
> > I forgot to add "AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>".
> > Do I need to resubmit it?
>
> Yes.
>
> You also should use b4, so you won't be making such mistakes.
Thank you for your suggestion. I will resend v9.
>
> Best regards,
> Krzysztof
^ permalink raw reply [flat|nested] 6+ messages in thread
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Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-10 9:15 [PATCH v8 0/2] add VCP mailbox driver Jjian Zhou
2025-10-10 9:15 ` [PATCH v8 1/2] dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document Jjian Zhou
2025-10-11 6:51 ` Jjian Zhou (周建)
2025-10-12 2:59 ` Krzysztof Kozlowski
2025-10-13 5:48 ` Jjian Zhou (周建)
2025-10-10 9:15 ` [PATCH v8 2/2] mailbox: mediatek: Add mtk-vcp-mailbox driver Jjian Zhou
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