From: Rhyland Klein <rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
"linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org"
<devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114
Date: Fri, 1 Feb 2013 14:40:30 -0500 [thread overview]
Message-ID: <510C1A2E.5010408@nvidia.com> (raw)
In-Reply-To: <1359713962-16822-5-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 2/1/2013 5:18 AM, Peter De Schrijver wrote:
> Tegra114 introduces new PLL types. This requires new clocktypes as well
> as some new fields in the pll structure.
>
> Signed-off-by: Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> drivers/clk/tegra/clk-pll.c | 719 +++++++++++++++++++++++++++++++++++++++++++
> drivers/clk/tegra/clk.h | 47 +++
> 2 files changed, 766 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
> index 87d2f34..50114b7 100644
> --- a/drivers/clk/tegra/clk-pll.c
> +++ b/drivers/clk/tegra/clk-pll.c
> [snip]
> +struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
> + void __iomem *clk_base, void __iomem *pmc,
> + unsigned long flags, unsigned long fixed_rate,
> + struct tegra_clk_pll_params *pll_params,
> + u32 pll_flags,
> + struct tegra_clk_pll_freq_table *freq_table,
> + spinlock_t *lock)
> +{
> + if (!pll_params->pdiv_tohw)
> + return -EINVAL;
> +
This will cause the following warning:
warning: return makes pointer from integer without a cast
Same with occurrences in tegra_clk_register_pllm and
tegra_clk_register_pllc.
Should this instead be returning NULL?
-rhyland
--
nvpublic
next prev parent reply other threads:[~2013-02-01 19:40 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-01 10:18 [PATCH v5 00/10] Tegra114 clockframework Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 03/10] clk: tegra: Add PLL post divider table Peter De Schrijver
[not found] ` <1359713962-16822-4-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:28 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 09/10] clk: tegra: Implement clocks for Tegra114 Peter De Schrijver
2013-02-04 7:08 ` Prashant Gaikwad
[not found] ` <510F5E87.90801-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 10:45 ` Peter De Schrijver
[not found] ` <20130204104531.GQ2364-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-04 14:07 ` Peter De Schrijver
2013-02-04 21:01 ` Stephen Warren
2013-02-07 16:18 ` Peter De Schrijver
2013-02-04 14:34 ` Peter De Schrijver
[not found] ` <20130204143401.GW2364-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-05 5:36 ` Prashant Gaikwad
[not found] ` <1359713962-16822-1-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-01 10:18 ` [PATCH v5 01/10] clk: tegra: Refactor PLL programming code Peter De Schrijver
[not found] ` <1359713962-16822-2-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:06 ` Prashant Gaikwad
2013-02-04 14:32 ` Peter De Schrijver
2013-02-05 5:42 ` Prashant Gaikwad
[not found] ` <51109BB3.8000706-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-05 13:23 ` Peter De Schrijver
[not found] ` <20130205132355.GD3073-Rysk9IDjsxmJz7etNGeUX8VPkgjIgRvpAL8bYrjMMd8@public.gmane.org>
2013-02-06 12:32 ` Peter De Schrijver
2013-02-04 21:57 ` Stephen Warren
2013-02-01 10:18 ` [PATCH v5 02/10] clk: tegra: Add TEGRA_PLL_BYPASS flag Peter De Schrijver
[not found] ` <1359713962-16822-3-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:13 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 04/10] clk: tegra: Add new fields and PLL types for Tegra114 Peter De Schrijver
[not found] ` <1359713962-16822-5-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-01 19:40 ` Rhyland Klein [this message]
[not found] ` <510C1A2E.5010408-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:35 ` Prashant Gaikwad
[not found] ` <510F56B1.5060409-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 10:37 ` Peter De Schrijver
2013-02-01 10:18 ` [PATCH v5 05/10] clk: tegra: Add flags to tegra_clk_periph() Peter De Schrijver
[not found] ` <1359713962-16822-6-git-send-email-pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-02-04 6:33 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 06/10] clk: tegra: Workaround for Tegra114 MSENC problem Peter De Schrijver
2013-02-04 6:39 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 07/10] ARM: tegra: Define Tegra114 CAR binding Peter De Schrijver
2013-02-04 21:16 ` Stephen Warren
2013-02-01 10:18 ` [PATCH v5 08/10] ARM: dt: Add references to tegra_car clocks Peter De Schrijver
2013-02-04 6:45 ` Prashant Gaikwad
2013-02-01 10:18 ` [PATCH v5 10/10] clk: tegra: devicetree match for nvidia,tegra114-car Peter De Schrijver
2013-02-04 7:10 ` Prashant Gaikwad
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