From mboxrd@z Thu Jan  1 00:00:00 1970
From: Laxman Dewangan <ldewangan@nvidia.com>
Subject: Re: [PATCH] spi: tegra114: add spi driver
Date: Wed, 20 Feb 2013 18:56:13 +0530
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To: Mark Brown <broonie@opensource.wolfsonmicro.com>
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On Wednesday 20 February 2013 06:41 PM, Mark Brown wrote:
> * PGP Signed by an unknown key
>
> On Wed, Feb 20, 2013 at 05:59:03PM +0530, Laxman Dewangan wrote:
>>>> +	tspi->clk = devm_clk_get(&pdev->dev, "spi");
>>> Does this HW block use multiple clocks? If not, I think s/"spi"/NULL/
>>> there, just like the Tegra20 driver.
>> No, spi controller uses the only one clock. I will change to NULL.
> I'm never convinced that NULL is a helpful clock name to pick, it's not
> awesome if you ever acquire a second clock.

I had other idea of okeeping clock name here for power optimization.
Spi controller can take the power source ffrom different clock source 
say clk_m (crystal) and pllp.

I want to set the parent clock dynamically based on required speed so 
that if the desire speed can be meet from clk_m, no need to increase pll 
count and possible we may endup with siwtchng off pllp which can save power.

So for this I may require

spi_clk = devm_clk_get(&pdev->dev, "spi");
spi_clkm = devm_clk_get(&pdev->dev, "clmkm");
spi_pllp = devm_clk_get(&pdev->dev, "pllp");

and call clk_set_parent(spi_clk, spi_clkm) or clk_set_parent(spi_clk, spi_pllp).