From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Subject: Re: [PATCH v4 3/8] ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC) Date: Fri, 01 Mar 2013 13:05:38 -0700 Message-ID: <51310A12.1040209@wwwdotorg.org> References: <1361878774-6382-1-git-send-email-p.zabel@pengutronix.de> <1361878774-6382-4-git-send-email-p.zabel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1361878774-6382-4-git-send-email-p.zabel@pengutronix.de> Sender: linux-pm-owner@vger.kernel.org To: Philipp Zabel Cc: linux-arm-kernel@lists.infradead.org, Marek Vasut , Fabio Estevam , Sascha Hauer , Shawn Guo , kernel@pengutronix.de, devicetree-discuss@lists.ozlabs.org, Mike Turquette , Len Brown , Pavel Machek , "Rafael J. Wysocki" , linux-pm@vger.kernel.org List-Id: devicetree@vger.kernel.org On 02/26/2013 04:39 AM, Philipp Zabel wrote: > The SRC has auto-deasserting reset bits that control reset lines to > the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset > controller that can be controlled by those devices using the > reset controller API. > diff --git a/Documentation/devicetree/bindings/reset/fsl,imx-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx-src.txt > +Specifying reset lines connected to IP modules > +============================================== ... > +example: > + > + ipu1: ipu@02400000 { > + resets = <&src 2>; > + }; > + ipu2: ipu@02800000 { > + resets = <&src 4>; > + }; reset-names is mandatory in the documentation and implementation; you should probably add them to the example too. Nit: You could use BIT(x) instead of 1 << x in a few places in this file. But not a big deal.