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Thu, 15 Sep 2022 01:39:44 GMT Received: from [10.79.43.230] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 14 Sep 2022 18:39:41 -0700 Subject: Re: [PATCH 1/2] dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller To: Rob Herring CC: , , , , , , , , , References: <1663135386-26270-1-git-send-email-quic_sibis@quicinc.com> <1663135386-26270-2-git-send-email-quic_sibis@quicinc.com> <1663153683.714744.1742263.nullmailer@robh.at.kernel.org> From: Sibi Sankar Message-ID: <51488e14-084e-d5ce-5439-c69bd9f18159@quicinc.com> Date: Thu, 15 Sep 2022 07:09:38 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1663153683.714744.1742263.nullmailer@robh.at.kernel.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 36nAl5G7y6UOrL3pjG5D31IemSPzymZi X-Proofpoint-ORIG-GUID: 36nAl5G7y6UOrL3pjG5D31IemSPzymZi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-14_11,2022-09-14_04,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 mlxlogscore=956 clxscore=1011 phishscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2208220000 definitions=main-2209150007 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 9/14/22 4:38 PM, Rob Herring wrote: > On Wed, 14 Sep 2022 11:33:05 +0530, Sibi Sankar wrote: >> Add devicetree binding for CPUSS Control Processor (CPUCP) mailbox >> controller. >> >> Signed-off-by: Sibi Sankar >> --- >> .../bindings/mailbox/qcom,cpucp-mbox.yaml | 51 ++++++++++++++++++++++ >> 1 file changed, 51 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml >> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.example.dtb: mailbox@17400000: reg: [[0, 398458880], [0, 16], [0, 408486656], [0, 1792]] is too long > From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml > > doc reference errors (make refcheckdocs): yup noticed that I hadn't included these fixes when I sent the patches out. Will fix it in the next re-spin. > > See https://patchwork.ozlabs.org/patch/ > > This check can fail if there are any dependencies. The base for a patch > series is generally the most recent rc1. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit. >