* [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs
@ 2013-04-05 20:23 Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected Gregory CLEMENT
` (9 more replies)
0 siblings, 10 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:23 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
Hello,
The Armada XP SoCs have LPAE support. This is the second version patch
set whixh allow to run kernel on this SoCs with LPAE support.
The biggest changes are the conversion of the device tree file to 64
bits in order to be able to use more than 4GB of memory (without this
the LPAE is pointless).
The main change since the first version is the usage of the range
property as suggested by Rob Herring. As this massive change on the
dts file will have an impact on the mvebu-mbus driver binding, I also
added some patches from Thomas Petazzoni. The purpose is to avoid a
new big change in the devices tree files when Thomas will improve the
mvebu-mbus driver to rely on the device tree.
The other point is about DMA usage. LPAE allows to use 40bits address
only between CPU and DRAM. All the DMA transfer are restricted to the
low 32 bits address space. The first version try to use DMABOUNCE to
allows DMA transfer from any place in memory. There were a consensus
on the fact that was a something to avoid. The alternative was
swiotlb, however it will require a large rewrite of
arch/arm/mach-mvebu/coherency.c (our dma_map_ops was defined here),
and we are close the opening of the merge window. So I chose, in a
first phase, to use ZONE_DMA to limit the use of the DMA on the 32
bits address space. Later our dma_map_ops would be improve with
swiotlb.
This new patch set have been tested on a Armada XP GP board with 8GB
of DRAM with LPAE selected. It have been tested on Armada XP DB board
with 3GB of DRAM with and without LPAE. And also on the Armada 370 DB
board (without LPAE) to check that no regression appeared.
This patch set is based on 3.9-rc5 and is still 3.10 material. The git
branch called lpae-v2 is available at:
https://github.com/MISL-EBU-System-SW/mainline-public.git.
Thanks,
Changelog:
v1 -> v2:
* The patch to convert the mvebu device tree files to 64 bits was
split in 3 parts:
- "arm: dts: move all peripherals inside soc" from Thomas
- then "arm: dts: Convert all the mvebu files to use the range
property" which will allow to keep 32 bits addresses for the
internal registers whereas the memory of the system will be 64
bits
- and finally "arm: dts: Convert mvebu device tree files to 64
bits" which was the move to 64 bits itself.
* A new patch was added "arm: dts: introduce internal-regs node" based
on the work of Thomas for the mvebu-mbus driver. It introduce a
'internal-regs' subnode, under which all devices are moved. This is
not really needed for now, but will be for the mvebu-mbus
driver. This generates a lot of code movement since it's indenting
by one more tab all the devices. So it was a good opportunity to fix
all the bad indentation.
* New patch from Thomas "fix cpus section indentation" to finalize the
fixing of the bad indentation
* For DMA transfer, DMA_ZONE was selected instead of DMABOUNCE: all
the DMA transfer are restricted to the low 32 bits address space.
Gregory CLEMENT (4):
arm: mvebu: Limit the DMA zone when LPAE is selected
arm: dts: mvebu: Convert all the mvebu files to use the range
property
arm: dts: mvebu: introduce internal-regs node
arm: dts: mvebu: Convert mvebu device tree files to 64 bits
Lior Amsalem (3):
arm: mvebu: Align the internal registers virtual base to support LPAE
arm: mvebu: Enable pj4b on LPAE compilations
arm: dts: Add a 64 bits version of the skeleton device tree
Thomas Petazzoni (2):
arm: dts: mvebu: move all peripherals inside soc
arm: dts: mvebu: fix cpus section indentation
arch/arm/boot/dts/armada-370-db.dts | 110 +++++-----
arch/arm/boot/dts/armada-370-mirabox.dts | 80 +++----
arch/arm/boot/dts/armada-370-rd.dts | 18 +-
arch/arm/boot/dts/armada-370-xp.dtsi | 253 +++++++++++-----------
arch/arm/boot/dts/armada-370.dtsi | 211 +++++++++---------
arch/arm/boot/dts/armada-xp-db.dts | 156 ++++++-------
arch/arm/boot/dts/armada-xp-gp.dts | 138 ++++++------
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 84 +++----
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 110 +++++-----
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 136 ++++++------
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 198 ++++++++---------
arch/arm/boot/dts/armada-xp.dtsi | 191 ++++++++--------
arch/arm/boot/dts/skeleton64.dtsi | 13 ++
arch/arm/include/debug/mvebu.S | 2 +-
arch/arm/mach-mvebu/Kconfig | 1 +
arch/arm/mach-mvebu/armada-370-xp.h | 2 +-
arch/arm/mm/proc-v7.S | 3 +-
17 files changed, 873 insertions(+), 833 deletions(-)
create mode 100644 arch/arm/boot/dts/skeleton64.dtsi
--
1.7.9.5
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
@ 2013-04-05 20:23 ` Gregory CLEMENT
2013-04-05 20:41 ` Arnd Bergmann
2013-04-05 20:23 ` [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE Gregory CLEMENT
` (8 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:23 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
When LPAE is activated on Armada XP, all registers and IOs are still
32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
That means that all the DMA transfer are restricted to the low 32 bits
address space. This is limitation is achieved by selecting ZONE_DMA.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/mach-mvebu/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 440b13e..db1bbc8 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -13,6 +13,7 @@ config ARCH_MVEBU
select MVEBU_CLK_CORE
select MVEBU_CLK_CPU
select MVEBU_CLK_GATING
+ select ZONE_DMA if ARM_LPAE
if ARCH_MVEBU
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected Gregory CLEMENT
@ 2013-04-05 20:23 ` Gregory CLEMENT
2013-04-05 20:50 ` Arnd Bergmann
2013-04-05 20:23 ` [PATCH v2 3/9] arm: mvebu: Enable pj4b on LPAE compilations Gregory CLEMENT
` (7 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:23 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
From: Lior Amsalem <alior@marvell.com>
In order to be able to support he LPAE, the internal registers virtual
base must be aligned to 2MB.
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/include/debug/mvebu.S | 2 +-
arch/arm/mach-mvebu/armada-370-xp.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S
index 865c6d0..df191af 100644
--- a/arch/arm/include/debug/mvebu.S
+++ b/arch/arm/include/debug/mvebu.S
@@ -12,7 +12,7 @@
*/
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
-#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000
+#define ARMADA_370_XP_REGS_VIRT_BASE 0xfec00000
.macro addruart, rp, rv, tmp
ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE
diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h
index c6a7d74..c49c08e 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.h
+++ b/arch/arm/mach-mvebu/armada-370-xp.h
@@ -16,7 +16,7 @@
#define __MACH_ARMADA_370_XP_H
#define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000
-#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfeb00000)
+#define ARMADA_370_XP_REGS_VIRT_BASE IOMEM(0xfec00000)
#define ARMADA_370_XP_REGS_SIZE SZ_1M
#ifdef CONFIG_SMP
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 3/9] arm: mvebu: Enable pj4b on LPAE compilations
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE Gregory CLEMENT
@ 2013-04-05 20:23 ` Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 4/9] arm: dts: Add a 64 bits version of the skeleton device tree Gregory CLEMENT
` (6 subsequent siblings)
9 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:23 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
From: Lior Amsalem <alior@marvell.com>
pj4b cpus are LPAE capable so enable them on LPAE compilations
Signed-off-by: Lior Amsalem <alior@marvell.com>
Tested-by: Franklin <flin@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/mm/proc-v7.S | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 3a3c015..159c747 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -402,6 +402,8 @@ __v7_ca9mp_proc_info:
__v7_proc __v7_ca9mp_setup
.size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info
+#endif /* CONFIG_ARM_LPAE */
+
/*
* Marvell PJ4B processor.
*/
@@ -411,7 +413,6 @@ __v7_pj4b_proc_info:
.long 0xfffffff0
__v7_proc __v7_pj4b_setup
.size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info
-#endif /* CONFIG_ARM_LPAE */
/*
* ARM Ltd. Cortex A7 processor.
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 4/9] arm: dts: Add a 64 bits version of the skeleton device tree
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
` (2 preceding siblings ...)
2013-04-05 20:23 ` [PATCH v2 3/9] arm: mvebu: Enable pj4b on LPAE compilations Gregory CLEMENT
@ 2013-04-05 20:23 ` Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 5/9] arm: dts: mvebu: move all peripherals inside soc Gregory CLEMENT
` (5 subsequent siblings)
9 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:23 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
From: Lior Amsalem <alior@marvell.com>
In order to be able to use more than 4GB address-cells and size-cells
have to be set to 2
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
---
arch/arm/boot/dts/skeleton64.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
create mode 100644 arch/arm/boot/dts/skeleton64.dtsi
diff --git a/arch/arm/boot/dts/skeleton64.dtsi b/arch/arm/boot/dts/skeleton64.dtsi
new file mode 100644
index 0000000..1599415
--- /dev/null
+++ b/arch/arm/boot/dts/skeleton64.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree in the 64 bits version; the bare minimum
+ * needed to boot; just include and add a compatible value. The
+ * bootloader will typically populate the memory node.
+ */
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 5/9] arm: dts: mvebu: move all peripherals inside soc
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
` (3 preceding siblings ...)
2013-04-05 20:23 ` [PATCH v2 4/9] arm: dts: Add a 64 bits version of the skeleton device tree Gregory CLEMENT
@ 2013-04-05 20:24 ` Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 6/9] arm: dts: mvebu: Convert all the mvebu files to use the range property Gregory CLEMENT
` (4 subsequent siblings)
9 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:24 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/armada-370-xp.dtsi | 26 +++++++++++++-------------
arch/arm/boot/dts/armada-370.dtsi | 23 ++++++++++++-----------
arch/arm/boot/dts/armada-xp.dtsi | 32 ++++++++++++++++----------------
3 files changed, 41 insertions(+), 40 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 5b70820..bd26c48 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -28,19 +28,6 @@
};
};
- mpic: interrupt-controller@d0020000 {
- compatible = "marvell,mpic";
- #interrupt-cells = <1>;
- #size-cells = <1>;
- interrupt-controller;
- };
-
- coherency-fabric@d0020200 {
- compatible = "marvell,coherency-fabric";
- reg = <0xd0020200 0xb0>,
- <0xd0021810 0x1c>;
- };
-
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -48,6 +35,19 @@
interrupt-parent = <&mpic>;
ranges;
+ mpic: interrupt-controller@d0020000 {
+ compatible = "marvell,mpic";
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ };
+
+ coherency-fabric@d0020200 {
+ compatible = "marvell,coherency-fabric";
+ reg = <0xd0020200 0xb0>,
+ <0xd0021810 0x1c>;
+ };
+
serial@d0012000 {
compatible = "snps,dw-apb-uart";
reg = <0xd0012000 0x100>;
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 8188d13..03808aa 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -20,12 +20,6 @@
/ {
model = "Marvell Armada 370 family SoC";
compatible = "marvell,armada370", "marvell,armada-370-xp";
- L2: l2-cache {
- compatible = "marvell,aurora-outer-cache";
- reg = <0xd0008000 0x1000>;
- cache-id-part = <0x100>;
- wt-override;
- };
aliases {
gpio0 = &gpio0;
@@ -33,17 +27,24 @@
gpio2 = &gpio2;
};
- mpic: interrupt-controller@d0020000 {
- reg = <0xd0020a00 0x1d0>,
- <0xd0021870 0x58>;
- };
-
soc {
+ mpic: interrupt-controller@d0020000 {
+ reg = <0xd0020a00 0x1d0>,
+ <0xd0021870 0x58>;
+ };
+
system-controller@d0018200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0xd0018200 0x100>;
};
+ L2: l2-cache {
+ compatible = "marvell,aurora-outer-cache";
+ reg = <0xd0008000 0x1000>;
+ cache-id-part = <0x100>;
+ wt-override;
+ };
+
pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
reg = <0xd0018000 0x38>;
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index ca00d83..e644cc5 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -22,25 +22,25 @@
model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
- L2: l2-cache {
- compatible = "marvell,aurora-system-cache";
- reg = <0xd0008000 0x1000>;
- cache-id-part = <0x100>;
- wt-override;
- };
+ soc {
+ L2: l2-cache {
+ compatible = "marvell,aurora-system-cache";
+ reg = <0xd0008000 0x1000>;
+ cache-id-part = <0x100>;
+ wt-override;
+ };
- mpic: interrupt-controller@d0020000 {
- reg = <0xd0020a00 0x2d0>,
- <0xd0021070 0x58>;
- };
+ mpic: interrupt-controller@d0020000 {
+ reg = <0xd0020a00 0x2d0>,
+ <0xd0021070 0x58>;
+ };
- armada-370-xp-pmsu@d0022000 {
- compatible = "marvell,armada-370-xp-pmsu";
- reg = <0xd0022100 0x430>,
- <0xd0020800 0x20>;
- };
+ armada-370-xp-pmsu@d0022000 {
+ compatible = "marvell,armada-370-xp-pmsu";
+ reg = <0xd0022100 0x430>,
+ <0xd0020800 0x20>;
+ };
- soc {
serial@d0012200 {
compatible = "snps,dw-apb-uart";
reg = <0xd0012200 0x100>;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 6/9] arm: dts: mvebu: Convert all the mvebu files to use the range property
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
` (4 preceding siblings ...)
2013-04-05 20:24 ` [PATCH v2 5/9] arm: dts: mvebu: move all peripherals inside soc Gregory CLEMENT
@ 2013-04-05 20:24 ` Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 7/9] arm: dts: mvebu: introduce internal-regs node Gregory CLEMENT
` (3 subsequent siblings)
9 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:24 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
This conversion will allow to keep 32 bits addresses for the internal
registers whereas the memory of the system will be 64 bits.
Later it will also ease the move of the mvebu-mbus driver to the
device tree support.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-db.dts | 16 ++---
arch/arm/boot/dts/armada-370-mirabox.dts | 14 ++--
arch/arm/boot/dts/armada-370-rd.dts | 14 ++--
arch/arm/boot/dts/armada-370-xp.dtsi | 83 +++++++++++-----------
arch/arm/boot/dts/armada-370.dtsi | 49 ++++++-------
arch/arm/boot/dts/armada-xp-db.dts | 28 ++++----
arch/arm/boot/dts/armada-xp-gp.dts | 20 +++---
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 +--
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 18 ++---
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 18 ++---
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 22 +++---
arch/arm/boot/dts/armada-xp.dtsi | 65 ++++++++---------
12 files changed, 180 insertions(+), 177 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index e34b280..183901c 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -30,11 +30,11 @@
};
soc {
- serial@d0012000 {
+ serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
- sata@d00a0000 {
+ sata@a0000 {
nr-ports = <2>;
status = "okay";
};
@@ -49,18 +49,18 @@
};
};
- ethernet@d0070000 {
+ ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
- ethernet@d0074000 {
+ ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
- mvsdio@d00d4000 {
+ mvsdio@d4000 {
pinctrl-0 = <&sdio_pins1>;
pinctrl-names = "default";
/*
@@ -75,15 +75,15 @@
/* No CD or WP GPIOs */
};
- usb@d0050000 {
+ usb@50000 {
status = "okay";
};
- usb@d0051000 {
+ usb@51000 {
status = "okay";
};
- spi0: spi@d0010600 {
+ spi0: spi@10600 {
status = "okay";
spi-flash@0 {
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index dd0c57d..2773eee 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -25,11 +25,11 @@
};
soc {
- serial@d0012000 {
+ serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
- timer@d0020300 {
+ timer@20300 {
clock-frequency = <600000000>;
status = "okay";
};
@@ -42,18 +42,18 @@
reg = <1>;
};
};
- ethernet@d0070000 {
+ ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
- ethernet@d0074000 {
+ ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
- mvsdio@d00d4000 {
+ mvsdio@d4000 {
pinctrl-0 = <&sdio_pins2>;
pinctrl-names = "default";
status = "okay";
@@ -63,11 +63,11 @@
*/
};
- usb@d0050000 {
+ usb@50000 {
status = "okay";
};
- usb@d0051000 {
+ usb@51000 {
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index 070bba4..be209020 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -28,11 +28,11 @@
};
soc {
- serial@d0012000 {
+ serial@12000 {
clock-frequency = <200000000>;
status = "okay";
};
- sata@d00a0000 {
+ sata@a0000 {
nr-ports = <2>;
status = "okay";
};
@@ -47,29 +47,29 @@
};
};
- ethernet@d0070000 {
+ ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "sgmii";
};
- ethernet@d0074000 {
+ ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
- mvsdio@d00d4000 {
+ mvsdio@d4000 {
pinctrl-0 = <&sdio_pins1>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
};
- usb@d0050000 {
+ usb@50000 {
status = "okay";
};
- usb@d0051000 {
+ usb@51000 {
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index bd26c48..1874655 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -28,59 +28,60 @@
};
};
+
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&mpic>;
- ranges;
+ ranges = <0 0xd0000000 0x100000>;
- mpic: interrupt-controller@d0020000 {
- compatible = "marvell,mpic";
- #interrupt-cells = <1>;
- #size-cells = <1>;
- interrupt-controller;
+ mpic: interrupt-controller@20000 {
+ compatible = "marvell,mpic";
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
};
- coherency-fabric@d0020200 {
- compatible = "marvell,coherency-fabric";
- reg = <0xd0020200 0xb0>,
- <0xd0021810 0x1c>;
+ coherency-fabric@20200 {
+ compatible = "marvell,coherency-fabric";
+ reg = <0x20200 0xb0>,
+ <0x21810 0x1c>;
};
- serial@d0012000 {
+ serial@12000 {
compatible = "snps,dw-apb-uart";
- reg = <0xd0012000 0x100>;
+ reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <41>;
reg-io-width = <1>;
status = "disabled";
};
- serial@d0012100 {
+ serial@12100 {
compatible = "snps,dw-apb-uart";
- reg = <0xd0012100 0x100>;
+ reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <42>;
reg-io-width = <1>;
status = "disabled";
};
- timer@d0020300 {
+ timer@20300 {
compatible = "marvell,armada-370-xp-timer";
- reg = <0xd0020300 0x30>,
- <0xd0021040 0x30>;
+ reg = <0x20300 0x30>,
+ <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
clocks = <&coreclk 2>;
};
- addr-decoding@d0020000 {
+ addr-decoding@20000 {
compatible = "marvell,armada-addr-decoding-controller";
- reg = <0xd0020000 0x258>;
+ reg = <0x20000 0x258>;
};
- sata@d00a0000 {
+ sata@a0000 {
compatible = "marvell,orion-sata";
- reg = <0xd00a0000 0x2400>;
+ reg = <0xa0000 0x2400>;
interrupts = <55>;
clocks = <&gateclk 15>, <&gateclk 30>;
clock-names = "0", "1";
@@ -91,28 +92,28 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
- reg = <0xd0072004 0x4>;
+ reg = <0x72004 0x4>;
};
- ethernet@d0070000 {
+ ethernet@70000 {
compatible = "marvell,armada-370-neta";
- reg = <0xd0070000 0x2500>;
+ reg = <0x70000 0x2500>;
interrupts = <8>;
clocks = <&gateclk 4>;
status = "disabled";
};
- ethernet@d0074000 {
+ ethernet@74000 {
compatible = "marvell,armada-370-neta";
- reg = <0xd0074000 0x2500>;
+ reg = <0x74000 0x2500>;
interrupts = <10>;
clocks = <&gateclk 3>;
status = "disabled";
};
- i2c0: i2c@d0011000 {
+ i2c0: i2c@11000 {
compatible = "marvell,mv64xxx-i2c";
- reg = <0xd0011000 0x20>;
+ reg = <0x11000 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <31>;
@@ -121,9 +122,9 @@
status = "disabled";
};
- i2c1: i2c@d0011100 {
+ i2c1: i2c@11100 {
compatible = "marvell,mv64xxx-i2c";
- reg = <0xd0011100 0x20>;
+ reg = <0x11100 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <32>;
@@ -134,35 +135,35 @@
rtc@10300 {
compatible = "marvell,orion-rtc";
- reg = <0xd0010300 0x20>;
+ reg = <0x10300 0x20>;
interrupts = <50>;
};
- mvsdio@d00d4000 {
+ mvsdio@d4000 {
compatible = "marvell,orion-sdio";
- reg = <0xd00d4000 0x200>;
+ reg = <0xd4000 0x200>;
interrupts = <54>;
clocks = <&gateclk 17>;
status = "disabled";
};
- usb@d0050000 {
+ usb@50000 {
compatible = "marvell,orion-ehci";
- reg = <0xd0050000 0x500>;
+ reg = <0x50000 0x500>;
interrupts = <45>;
status = "disabled";
};
- usb@d0051000 {
+ usb@51000 {
compatible = "marvell,orion-ehci";
- reg = <0xd0051000 0x500>;
+ reg = <0x51000 0x500>;
interrupts = <46>;
status = "disabled";
};
- spi0: spi@d0010600 {
+ spi0: spi@10600 {
compatible = "marvell,orion-spi";
- reg = <0xd0010600 0x28>;
+ reg = <0x10600 0x28>;
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
@@ -171,9 +172,9 @@
status = "disabled";
};
- spi1: spi@d0010680 {
+ spi1: spi@10680 {
compatible = "marvell,orion-spi";
- reg = <0xd0010680 0x28>;
+ reg = <0x10680 0x28>;
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 03808aa..661bdcb 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -28,14 +28,15 @@
};
soc {
- mpic: interrupt-controller@d0020000 {
- reg = <0xd0020a00 0x1d0>,
- <0xd0021870 0x58>;
+
+ mpic: interrupt-controller@20000 {
+ reg = <0x20a00 0x1d0>,
+ <0x21870 0x58>;
};
- system-controller@d0018200 {
+ system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
- reg = <0xd0018200 0x100>;
+ reg = <0x18200 0x100>;
};
L2: l2-cache {
@@ -47,7 +48,7 @@
pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
- reg = <0xd0018000 0x38>;
+ reg = <0x18000 0x38>;
sdio_pins1: sdio-pins1 {
marvell,pins = "mpp9", "mpp11", "mpp12",
@@ -62,9 +63,9 @@
};
};
- gpio0: gpio@d0018100 {
+ gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018100 0x40>;
+ reg = <0x18100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -73,9 +74,9 @@
interrupts = <82>, <83>, <84>, <85>;
};
- gpio1: gpio@d0018140 {
+ gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018140 0x40>;
+ reg = <0x18140 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -84,9 +85,9 @@
interrupts = <87>, <88>, <89>, <90>;
};
- gpio2: gpio@d0018180 {
+ gpio2: gpio@18180 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018180 0x40>;
+ reg = <0x18180 0x40>;
ngpios = <2>;
gpio-controller;
#gpio-cells = <2>;
@@ -95,23 +96,23 @@
interrupts = <91>;
};
- coreclk: mvebu-sar@d0018230 {
+ coreclk: mvebu-sar@18230 {
compatible = "marvell,armada-370-core-clock";
- reg = <0xd0018230 0x08>;
+ reg = <0x18230 0x08>;
#clock-cells = <1>;
};
- gateclk: clock-gating-control@d0018220 {
+ gateclk: clock-gating-control@18220 {
compatible = "marvell,armada-370-gating-clock";
- reg = <0xd0018220 0x4>;
+ reg = <0x18220 0x4>;
clocks = <&coreclk 0>;
#clock-cells = <1>;
};
- xor@d0060800 {
+ xor@60800 {
compatible = "marvell,orion-xor";
- reg = <0xd0060800 0x100
- 0xd0060A00 0x100>;
+ reg = <0x60800 0x100
+ 0x60A00 0x100>;
status = "okay";
xor00 {
@@ -127,10 +128,10 @@
};
};
- xor@d0060900 {
+ xor@60900 {
compatible = "marvell,orion-xor";
- reg = <0xd0060900 0x100
- 0xd0060b00 0x100>;
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
status = "okay";
xor10 {
@@ -146,11 +147,11 @@
};
};
- usb@d0050000 {
+ usb@50000 {
clocks = <&coreclk 0>;
};
- usb@d0051000 {
+ usb@51000 {
clocks = <&coreclk 0>;
};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index e83505e..5e2b595 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -30,24 +30,24 @@
};
soc {
- serial@d0012000 {
+ serial@12000 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012100 {
+ serial@12100 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012200 {
+ serial@12200 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012300 {
+ serial@12300 {
clock-frequency = <250000000>;
status = "okay";
};
- sata@d00a0000 {
+ sata@a0000 {
nr-ports = <2>;
status = "okay";
};
@@ -70,47 +70,47 @@
};
};
- ethernet@d0070000 {
+ ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
- ethernet@d0074000 {
+ ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
- ethernet@d0030000 {
+ ethernet@30000 {
status = "okay";
phy = <&phy2>;
phy-mode = "sgmii";
};
- ethernet@d0034000 {
+ ethernet@34000 {
status = "okay";
phy = <&phy3>;
phy-mode = "sgmii";
};
- mvsdio@d00d4000 {
+ mvsdio@d4000 {
pinctrl-0 = <&sdio_pins>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
};
- usb@d0050000 {
+ usb@50000 {
status = "okay";
};
- usb@d0051000 {
+ usb@51000 {
status = "okay";
};
- usb@d0052000 {
+ usb@52000 {
status = "okay";
};
- spi0: spi@d0010600 {
+ spi0: spi@10600 {
status = "okay";
spi-flash@0 {
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 1c8afe2..12b98d3 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -37,24 +37,24 @@
};
soc {
- serial@d0012000 {
+ serial@12000 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012100 {
+ serial@12100 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012200 {
+ serial@12200 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012300 {
+ serial@12300 {
clock-frequency = <250000000>;
status = "okay";
};
- sata@d00a0000 {
+ sata@a0000 {
nr-ports = <2>;
status = "okay";
};
@@ -77,28 +77,28 @@
};
};
- ethernet@d0070000 {
+ ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
- ethernet@d0074000 {
+ ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
- ethernet@d0030000 {
+ ethernet@30000 {
status = "okay";
phy = <&phy2>;
phy-mode = "rgmii-id";
};
- ethernet@d0034000 {
+ ethernet@34000 {
status = "okay";
phy = <&phy3>;
phy-mode = "rgmii-id";
};
- spi0: spi@d0010600 {
+ spi0: spi@10600 {
status = "okay";
spi-flash@0 {
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index f56c405..40fa72e 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -46,7 +46,7 @@
soc {
pinctrl {
compatible = "marvell,mv78230-pinctrl";
- reg = <0xd0018000 0x38>;
+ reg = <0x18000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -55,9 +55,9 @@
};
};
- gpio0: gpio@d0018100 {
+ gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018100 0x40>;
+ reg = <0x18100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -66,9 +66,9 @@
interrupts = <82>, <83>, <84>, <85>;
};
- gpio1: gpio@d0018140 {
+ gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018140 0x40>;
+ reg = <0x18140 0x40>;
ngpios = <17>;
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index f8f2b78..7578c21 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -47,7 +47,7 @@
soc {
pinctrl {
compatible = "marvell,mv78260-pinctrl";
- reg = <0xd0018000 0x38>;
+ reg = <0x18000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -56,9 +56,9 @@
};
};
- gpio0: gpio@d0018100 {
+ gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018100 0x40>;
+ reg = <0x18100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -67,9 +67,9 @@
interrupts = <82>, <83>, <84>, <85>;
};
- gpio1: gpio@d0018140 {
+ gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018140 0x40>;
+ reg = <0x18140 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -78,9 +78,9 @@
interrupts = <87>, <88>, <89>, <90>;
};
- gpio2: gpio@d0018180 {
+ gpio2: gpio@18180 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018180 0x40>;
+ reg = <0x18180 0x40>;
ngpios = <3>;
gpio-controller;
#gpio-cells = <2>;
@@ -89,9 +89,9 @@
interrupts = <91>;
};
- ethernet@d0034000 {
+ ethernet@34000 {
compatible = "marvell,armada-370-neta";
- reg = <0xd0034000 0x2500>;
+ reg = <0x34000 0x2500>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 936c25d..5280a4d 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -62,7 +62,7 @@
soc {
pinctrl {
compatible = "marvell,mv78460-pinctrl";
- reg = <0xd0018000 0x38>;
+ reg = <0x18000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
@@ -71,9 +71,9 @@
};
};
- gpio0: gpio@d0018100 {
+ gpio0: gpio@18100 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018100 0x40>;
+ reg = <0x18100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -82,9 +82,9 @@
interrupts = <82>, <83>, <84>, <85>;
};
- gpio1: gpio@d0018140 {
+ gpio1: gpio@18140 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018140 0x40>;
+ reg = <0x18140 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
@@ -93,9 +93,9 @@
interrupts = <87>, <88>, <89>, <90>;
};
- gpio2: gpio@d0018180 {
+ gpio2: gpio@18180 {
compatible = "marvell,orion-gpio";
- reg = <0xd0018180 0x40>;
+ reg = <0x18180 0x40>;
ngpios = <3>;
gpio-controller;
#gpio-cells = <2>;
@@ -104,9 +104,9 @@
interrupts = <91>;
};
- ethernet@d0034000 {
+ ethernet@34000 {
compatible = "marvell,armada-370-neta";
- reg = <0xd0034000 0x2500>;
+ reg = <0x34000 0x2500>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index 3818a82..a7bade4 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,11 +27,11 @@
};
soc {
- serial@d0012000 {
+ serial@12000 {
clock-frequency = <250000000>;
status = "okay";
};
- serial@d0012100 {
+ serial@12100 {
clock-frequency = <250000000>;
status = "okay";
};
@@ -96,31 +96,31 @@
};
};
- ethernet@d0070000 {
+ ethernet@70000 {
status = "okay";
phy = <&phy0>;
phy-mode = "sgmii";
};
- ethernet@d0074000 {
+ ethernet@74000 {
status = "okay";
phy = <&phy1>;
phy-mode = "sgmii";
};
- ethernet@d0030000 {
+ ethernet@30000 {
status = "okay";
phy = <&phy2>;
phy-mode = "sgmii";
};
- ethernet@d0034000 {
+ ethernet@34000 {
status = "okay";
phy = <&phy3>;
phy-mode = "sgmii";
};
- i2c@d0011000 {
+ i2c@11000 {
status = "okay";
clock-frequency = <400000>;
};
- i2c@d0011100 {
+ i2c@11100 {
status = "okay";
clock-frequency = <400000>;
@@ -129,14 +129,14 @@
reg = <0x30>;
};
};
- sata@d00a0000 {
+ sata@a0000 {
nr-ports = <2>;
status = "okay";
};
- usb@d0050000 {
+ usb@50000 {
status = "okay";
};
- usb@d0051000 {
+ usb@51000 {
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index e644cc5..6ca6b7a 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -22,83 +22,84 @@
model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
+
soc {
L2: l2-cache {
compatible = "marvell,aurora-system-cache";
- reg = <0xd0008000 0x1000>;
+ reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
wt-override;
};
- mpic: interrupt-controller@d0020000 {
- reg = <0xd0020a00 0x2d0>,
- <0xd0021070 0x58>;
+ mpic: interrupt-controller@20000 {
+ reg = <0x20a00 0x2d0>,
+ <0x21070 0x58>;
};
- armada-370-xp-pmsu@d0022000 {
+ armada-370-xp-pmsu@22000 {
compatible = "marvell,armada-370-xp-pmsu";
- reg = <0xd0022100 0x430>,
- <0xd0020800 0x20>;
+ reg = <0x22100 0x430>,
+ <0x20800 0x20>;
};
- serial@d0012200 {
+ serial@12200 {
compatible = "snps,dw-apb-uart";
- reg = <0xd0012200 0x100>;
+ reg = <0x12200 0x100>;
reg-shift = <2>;
interrupts = <43>;
reg-io-width = <1>;
status = "disabled";
};
- serial@d0012300 {
+ serial@12300 {
compatible = "snps,dw-apb-uart";
- reg = <0xd0012300 0x100>;
+ reg = <0x12300 0x100>;
reg-shift = <2>;
interrupts = <44>;
reg-io-width = <1>;
status = "disabled";
};
- timer@d0020300 {
+ timer@20300 {
marvell,timer-25Mhz;
};
- coreclk: mvebu-sar@d0018230 {
+ coreclk: mvebu-sar@18230 {
compatible = "marvell,armada-xp-core-clock";
- reg = <0xd0018230 0x08>;
+ reg = <0x18230 0x08>;
#clock-cells = <1>;
};
- cpuclk: clock-complex@d0018700 {
+ cpuclk: clock-complex@18700 {
#clock-cells = <1>;
compatible = "marvell,armada-xp-cpu-clock";
- reg = <0xd0018700 0xA0>;
+ reg = <0x18700 0xA0>;
clocks = <&coreclk 1>;
};
- gateclk: clock-gating-control@d0018220 {
+ gateclk: clock-gating-control@18220 {
compatible = "marvell,armada-xp-gating-clock";
- reg = <0xd0018220 0x4>;
+ reg = <0x18220 0x4>;
clocks = <&coreclk 0>;
#clock-cells = <1>;
};
- system-controller@d0018200 {
+ system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
- reg = <0xd0018200 0x500>;
+ reg = <0x18200 0x500>;
};
- ethernet@d0030000 {
+ ethernet@30000 {
compatible = "marvell,armada-370-neta";
- reg = <0xd0030000 0x2500>;
+ reg = <0x30000 0x2500>;
interrupts = <12>;
clocks = <&gateclk 2>;
status = "disabled";
};
- xor@d0060900 {
+ xor@60900 {
compatible = "marvell,orion-xor";
- reg = <0xd0060900 0x100
- 0xd0060b00 0x100>;
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
clocks = <&gateclk 22>;
status = "okay";
@@ -115,10 +116,10 @@
};
};
- xor@d00f0900 {
+ xor@f0900 {
compatible = "marvell,orion-xor";
- reg = <0xd00F0900 0x100
- 0xd00F0B00 0x100>;
+ reg = <0xF0900 0x100
+ 0xF0B00 0x100>;
clocks = <&gateclk 28>;
status = "okay";
@@ -135,17 +136,17 @@
};
};
- usb@d0050000 {
+ usb@50000 {
clocks = <&gateclk 18>;
};
- usb@d0051000 {
+ usb@51000 {
clocks = <&gateclk 19>;
};
- usb@d0052000 {
+ usb@52000 {
compatible = "marvell,orion-ehci";
- reg = <0xd0052000 0x500>;
+ reg = <0x52000 0x500>;
interrupts = <47>;
clocks = <&gateclk 20>;
status = "disabled";
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 7/9] arm: dts: mvebu: introduce internal-regs node
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
` (5 preceding siblings ...)
2013-04-05 20:24 ` [PATCH v2 6/9] arm: dts: mvebu: Convert all the mvebu files to use the range property Gregory CLEMENT
@ 2013-04-05 20:24 ` Gregory CLEMENT
[not found] ` <1365193444-13441-8-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-04-05 20:24 ` [PATCH v2 8/9] arm: dts: mvebu: fix cpus section indentation Gregory CLEMENT
` (2 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:24 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-db.dts | 108 +++++-----
arch/arm/boot/dts/armada-370-mirabox.dts | 78 ++++----
arch/arm/boot/dts/armada-370-rd.dts | 2 +
arch/arm/boot/dts/armada-370-xp.dtsi | 228 +++++++++++-----------
arch/arm/boot/dts/armada-370.dtsi | 211 ++++++++++----------
arch/arm/boot/dts/armada-xp-db.dts | 154 +++++++--------
arch/arm/boot/dts/armada-xp-gp.dts | 124 ++++++------
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 56 +++---
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 80 ++++----
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 80 ++++----
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 196 ++++++++++---------
arch/arm/boot/dts/armada-xp.dtsi | 182 +++++++++--------
12 files changed, 759 insertions(+), 740 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 183901c..6c30a9f 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -30,68 +30,70 @@
};
soc {
- serial@12000 {
- clock-frequency = <200000000>;
- status = "okay";
- };
- sata@a0000 {
- nr-ports = <2>;
- status = "okay";
- };
-
- mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
+ internal-regs {
+ serial@12000 {
+ clock-frequency = <200000000>;
+ status = "okay";
+ };
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
};
- phy1: ethernet-phy@1 {
- reg = <1>;
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
};
- };
- ethernet@70000 {
- status = "okay";
- phy = <&phy0>;
- phy-mode = "rgmii-id";
- };
- ethernet@74000 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "rgmii-id";
- };
+ ethernet@70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@74000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
- mvsdio@d4000 {
- pinctrl-0 = <&sdio_pins1>;
- pinctrl-names = "default";
- /*
- * This device is disabled by default, because
- * using the SD card connector requires
- * changing the default CON40 connector
- * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
- * different connector
- * "DB-88F6710_MPP_RGMII_SD_Jumper".
- */
- status = "disabled";
- /* No CD or WP GPIOs */
- };
+ mvsdio@d4000 {
+ pinctrl-0 = <&sdio_pins1>;
+ pinctrl-names = "default";
+ /*
+ * This device is disabled by default, because
+ * using the SD card connector requires
+ * changing the default CON40 connector
+ * "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
+ * different connector
+ * "DB-88F6710_MPP_RGMII_SD_Jumper".
+ */
+ status = "disabled";
+ /* No CD or WP GPIOs */
+ };
- usb@50000 {
- status = "okay";
- };
+ usb@50000 {
+ status = "okay";
+ };
- usb@51000 {
- status = "okay";
- };
+ usb@51000 {
+ status = "okay";
+ };
- spi0: spi@10600 {
- status = "okay";
+ spi0: spi@10600 {
+ status = "okay";
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mx25l25635e";
- reg = <0>; /* Chip select 0 */
- spi-max-frequency = <50000000>;
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mx25l25635e";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <50000000>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index 2773eee..5a06e87 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -25,50 +25,52 @@
};
soc {
- serial@12000 {
- clock-frequency = <200000000>;
- status = "okay";
- };
- timer@20300 {
- clock-frequency = <600000000>;
- status = "okay";
- };
- mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
+ internal-regs {
+ serial@12000 {
+ clock-frequency = <200000000>;
+ status = "okay";
};
+ timer@20300 {
+ clock-frequency = <600000000>;
+ status = "okay";
+ };
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
- phy1: ethernet-phy@1 {
- reg = <1>;
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ ethernet@70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@74000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
};
- };
- ethernet@70000 {
- status = "okay";
- phy = <&phy0>;
- phy-mode = "rgmii-id";
- };
- ethernet@74000 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "rgmii-id";
- };
- mvsdio@d4000 {
- pinctrl-0 = <&sdio_pins2>;
- pinctrl-names = "default";
- status = "okay";
- /*
- * No CD or WP GPIOs: SDIO interface used for
- * Wifi/Bluetooth chip
- */
- };
+ mvsdio@d4000 {
+ pinctrl-0 = <&sdio_pins2>;
+ pinctrl-names = "default";
+ status = "okay";
+ /*
+ * No CD or WP GPIOs: SDIO interface used for
+ * Wifi/Bluetooth chip
+ */
+ };
- usb@50000 {
- status = "okay";
- };
+ usb@50000 {
+ status = "okay";
+ };
- usb@51000 {
- status = "okay";
+ usb@51000 {
+ status = "okay";
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index be209020..437dcd2 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -28,6 +28,7 @@
};
soc {
+ internal-regs {
serial@12000 {
clock-frequency = <200000000>;
status = "okay";
@@ -72,5 +73,6 @@
usb@51000 {
status = "okay";
};
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 1874655..8b9adc6 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -28,7 +28,6 @@
};
};
-
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -36,151 +35,156 @@
interrupt-parent = <&mpic>;
ranges = <0 0xd0000000 0x100000>;
- mpic: interrupt-controller@20000 {
+ internal-regs {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ mpic: interrupt-controller@20000 {
compatible = "marvell,mpic";
#interrupt-cells = <1>;
#size-cells = <1>;
interrupt-controller;
- };
+ };
- coherency-fabric@20200 {
+ coherency-fabric@20200 {
compatible = "marvell,coherency-fabric";
- reg = <0x20200 0xb0>,
- <0x21810 0x1c>;
- };
+ reg = <0x20200 0xb0>, <0x21810 0x1c>;
+ };
- serial@12000 {
+ serial@12000 {
compatible = "snps,dw-apb-uart";
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <41>;
reg-io-width = <1>;
status = "disabled";
- };
- serial@12100 {
+ };
+ serial@12100 {
compatible = "snps,dw-apb-uart";
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <42>;
reg-io-width = <1>;
status = "disabled";
- };
-
- timer@20300 {
- compatible = "marvell,armada-370-xp-timer";
- reg = <0x20300 0x30>,
- <0x21040 0x30>;
- interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
- clocks = <&coreclk 2>;
- };
-
- addr-decoding@20000 {
- compatible = "marvell,armada-addr-decoding-controller";
- reg = <0x20000 0x258>;
- };
-
- sata@a0000 {
- compatible = "marvell,orion-sata";
- reg = <0xa0000 0x2400>;
- interrupts = <55>;
- clocks = <&gateclk 15>, <&gateclk 30>;
- clock-names = "0", "1";
- status = "disabled";
- };
+ };
+
+ timer@20300 {
+ compatible = "marvell,armada-370-xp-timer";
+ reg = <0x20300 0x30>, <0x21040 0x30>;
+ interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
+ clocks = <&coreclk 2>;
+ };
+
+ addr-decoding@20000 {
+ compatible = "marvell,armada-addr-decoding-controller";
+ reg = <0x20000 0x258>;
+ };
+
+ sata@a0000 {
+ compatible = "marvell,orion-sata";
+ reg = <0xa0000 0x2400>;
+ interrupts = <55>;
+ clocks = <&gateclk 15>, <&gateclk 30>;
+ clock-names = "0", "1";
+ status = "disabled";
+ };
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "marvell,orion-mdio";
- reg = <0x72004 0x4>;
- };
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,orion-mdio";
+ reg = <0x72004 0x4>;
+ };
- ethernet@70000 {
+ ethernet@70000 {
compatible = "marvell,armada-370-neta";
reg = <0x70000 0x2500>;
interrupts = <8>;
clocks = <&gateclk 4>;
status = "disabled";
- };
+ };
- ethernet@74000 {
+ ethernet@74000 {
compatible = "marvell,armada-370-neta";
reg = <0x74000 0x2500>;
interrupts = <10>;
clocks = <&gateclk 3>;
status = "disabled";
- };
-
- i2c0: i2c@11000 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11000 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <31>;
- timeout-ms = <1000>;
- clocks = <&coreclk 0>;
- status = "disabled";
- };
-
- i2c1: i2c@11100 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11100 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <32>;
- timeout-ms = <1000>;
- clocks = <&coreclk 0>;
- status = "disabled";
- };
-
- rtc@10300 {
- compatible = "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <50>;
- };
-
- mvsdio@d4000 {
- compatible = "marvell,orion-sdio";
- reg = <0xd4000 0x200>;
- interrupts = <54>;
- clocks = <&gateclk 17>;
- status = "disabled";
- };
-
- usb@50000 {
- compatible = "marvell,orion-ehci";
- reg = <0x50000 0x500>;
- interrupts = <45>;
- status = "disabled";
- };
-
- usb@51000 {
- compatible = "marvell,orion-ehci";
- reg = <0x51000 0x500>;
- interrupts = <46>;
- status = "disabled";
- };
+ };
+
+ i2c0: i2c@11000 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11000 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <31>;
+ timeout-ms = <1000>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@11100 {
+ compatible = "marvell,mv64xxx-i2c";
+ reg = <0x11100 0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <32>;
+ timeout-ms = <1000>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ rtc@10300 {
+ compatible = "marvell,orion-rtc";
+ reg = <0x10300 0x20>;
+ interrupts = <50>;
+ };
+
+ mvsdio@d4000 {
+ compatible = "marvell,orion-sdio";
+ reg = <0xd4000 0x200>;
+ interrupts = <54>;
+ clocks = <&gateclk 17>;
+ status = "disabled";
+ };
- spi0: spi@10600 {
- compatible = "marvell,orion-spi";
- reg = <0x10600 0x28>;
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- interrupts = <30>;
- clocks = <&coreclk 0>;
- status = "disabled";
- };
+ usb@50000 {
+ compatible = "marvell,orion-ehci";
+ reg = <0x50000 0x500>;
+ interrupts = <45>;
+ status = "disabled";
+ };
- spi1: spi@10680 {
- compatible = "marvell,orion-spi";
- reg = <0x10680 0x28>;
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <1>;
- interrupts = <92>;
- clocks = <&coreclk 0>;
- status = "disabled";
+ usb@51000 {
+ compatible = "marvell,orion-ehci";
+ reg = <0x51000 0x500>;
+ interrupts = <46>;
+ status = "disabled";
+ };
+
+ spi0: spi@10600 {
+ compatible = "marvell,orion-spi";
+ reg = <0x10600 0x28>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ interrupts = <30>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ spi1: spi@10680 {
+ compatible = "marvell,orion-spi";
+ reg = <0x10680 0x28>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ interrupts = <92>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 661bdcb..296097d 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -28,132 +28,131 @@
};
soc {
-
- mpic: interrupt-controller@20000 {
- reg = <0x20a00 0x1d0>,
- <0x21870 0x58>;
- };
-
- system-controller@18200 {
+ internal-regs {
+ system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
- };
-
- L2: l2-cache {
- compatible = "marvell,aurora-outer-cache";
- reg = <0xd0008000 0x1000>;
- cache-id-part = <0x100>;
- wt-override;
- };
-
- pinctrl {
- compatible = "marvell,mv88f6710-pinctrl";
- reg = <0x18000 0x38>;
+ };
- sdio_pins1: sdio-pins1 {
- marvell,pins = "mpp9", "mpp11", "mpp12",
- "mpp13", "mpp14", "mpp15";
- marvell,function = "sd0";
+ L2: l2-cache {
+ compatible = "marvell,aurora-outer-cache";
+ reg = <0xd0008000 0x1000>;
+ cache-id-part = <0x100>;
+ wt-override;
};
- sdio_pins2: sdio-pins2 {
- marvell,pins = "mpp47", "mpp48", "mpp49",
- "mpp50", "mpp51", "mpp52";
- marvell,function = "sd0";
+ mpic: interrupt-controller@20000 {
+ reg = <0x20a00 0x1d0>, <0x21870 0x58>;
};
- };
-
- gpio0: gpio@18100 {
- compatible = "marvell,orion-gpio";
- reg = <0x18100 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <82>, <83>, <84>, <85>;
- };
- gpio1: gpio@18140 {
- compatible = "marvell,orion-gpio";
- reg = <0x18140 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <87>, <88>, <89>, <90>;
- };
+ pinctrl {
+ compatible = "marvell,mv88f6710-pinctrl";
+ reg = <0x18000 0x38>;
- gpio2: gpio@18180 {
- compatible = "marvell,orion-gpio";
- reg = <0x18180 0x40>;
- ngpios = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <91>;
- };
+ sdio_pins1: sdio-pins1 {
+ marvell,pins = "mpp9", "mpp11", "mpp12",
+ "mpp13", "mpp14", "mpp15";
+ marvell,function = "sd0";
+ };
- coreclk: mvebu-sar@18230 {
- compatible = "marvell,armada-370-core-clock";
- reg = <0x18230 0x08>;
- #clock-cells = <1>;
- };
+ sdio_pins2: sdio-pins2 {
+ marvell,pins = "mpp47", "mpp48", "mpp49",
+ "mpp50", "mpp51", "mpp52";
+ marvell,function = "sd0";
+ };
+ };
- gateclk: clock-gating-control@18220 {
- compatible = "marvell,armada-370-gating-clock";
- reg = <0x18220 0x4>;
- clocks = <&coreclk 0>;
- #clock-cells = <1>;
- };
+ gpio0: gpio@18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <82>, <83>, <84>, <85>;
+ };
- xor@60800 {
- compatible = "marvell,orion-xor";
- reg = <0x60800 0x100
- 0x60A00 0x100>;
- status = "okay";
+ gpio1: gpio@18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <87>, <88>, <89>, <90>;
+ };
- xor00 {
- interrupts = <51>;
- dmacap,memcpy;
- dmacap,xor;
+ gpio2: gpio@18180 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18180 0x40>;
+ ngpios = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <91>;
};
- xor01 {
- interrupts = <52>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
+
+ coreclk: mvebu-sar@18230 {
+ compatible = "marvell,armada-370-core-clock";
+ reg = <0x18230 0x08>;
+ #clock-cells = <1>;
};
- };
- xor@60900 {
- compatible = "marvell,orion-xor";
- reg = <0x60900 0x100
- 0x60b00 0x100>;
- status = "okay";
+ gateclk: clock-gating-control@18220 {
+ compatible = "marvell,armada-370-gating-clock";
+ reg = <0x18220 0x4>;
+ clocks = <&coreclk 0>;
+ #clock-cells = <1>;
+ };
- xor10 {
- interrupts = <94>;
- dmacap,memcpy;
- dmacap,xor;
+ xor@60800 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60800 0x100
+ 0x60A00 0x100>;
+ status = "okay";
+
+ xor00 {
+ interrupts = <51>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <52>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
};
- xor11 {
- interrupts = <95>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
+
+ xor@60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+ status = "okay";
+
+ xor10 {
+ interrupts = <94>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor11 {
+ interrupts = <95>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
};
- };
- usb@50000 {
- clocks = <&coreclk 0>;
- };
+ usb@50000 {
+ clocks = <&coreclk 0>;
+ };
- usb@51000 {
- clocks = <&coreclk 0>;
+ usb@51000 {
+ clocks = <&coreclk 0>;
+ };
};
-
};
};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 5e2b595..fbd0f04 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -30,95 +30,97 @@
};
soc {
- serial@12000 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12100 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12200 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12300 {
- clock-frequency = <250000000>;
- status = "okay";
- };
-
- sata@a0000 {
- nr-ports = <2>;
- status = "okay";
- };
-
- mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
+ internal-regs {
+ serial@12000 {
+ clock-frequency = <250000000>;
+ status = "okay";
};
-
- phy1: ethernet-phy@1 {
- reg = <1>;
+ serial@12100 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12200 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12300 {
+ clock-frequency = <250000000>;
+ status = "okay";
};
- phy2: ethernet-phy@2 {
- reg = <25>;
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
};
- phy3: ethernet-phy@3 {
- reg = <27>;
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy@2 {
+ reg = <25>;
+ };
+
+ phy3: ethernet-phy@3 {
+ reg = <27>;
+ };
};
- };
- ethernet@70000 {
- status = "okay";
- phy = <&phy0>;
- phy-mode = "rgmii-id";
- };
- ethernet@74000 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "rgmii-id";
- };
- ethernet@30000 {
- status = "okay";
- phy = <&phy2>;
- phy-mode = "sgmii";
- };
- ethernet@34000 {
- status = "okay";
- phy = <&phy3>;
- phy-mode = "sgmii";
- };
+ ethernet@70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@74000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@30000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "sgmii";
+ };
+ ethernet@34000 {
+ status = "okay";
+ phy = <&phy3>;
+ phy-mode = "sgmii";
+ };
- mvsdio@d4000 {
- pinctrl-0 = <&sdio_pins>;
- pinctrl-names = "default";
- status = "okay";
- /* No CD or WP GPIOs */
- };
+ mvsdio@d4000 {
+ pinctrl-0 = <&sdio_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ /* No CD or WP GPIOs */
+ };
- usb@50000 {
- status = "okay";
- };
+ usb@50000 {
+ status = "okay";
+ };
- usb@51000 {
- status = "okay";
- };
+ usb@51000 {
+ status = "okay";
+ };
- usb@52000 {
- status = "okay";
- };
+ usb@52000 {
+ status = "okay";
+ };
- spi0: spi@10600 {
- status = "okay";
+ spi0: spi@10600 {
+ status = "okay";
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "m25p64";
- reg = <0>; /* Chip select 0 */
- spi-max-frequency = <20000000>;
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p64";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <20000000>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index 12b98d3..b0298d7 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -37,76 +37,78 @@
};
soc {
- serial@12000 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12100 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12200 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12300 {
- clock-frequency = <250000000>;
- status = "okay";
- };
-
- sata@a0000 {
- nr-ports = <2>;
- status = "okay";
- };
-
- mdio {
- phy0: ethernet-phy@0 {
- reg = <16>;
+ internal-regs {
+ serial@12000 {
+ clock-frequency = <250000000>;
+ status = "okay";
};
-
- phy1: ethernet-phy@1 {
- reg = <17>;
+ serial@12100 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12200 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@12300 {
+ clock-frequency = <250000000>;
+ status = "okay";
};
- phy2: ethernet-phy@2 {
- reg = <18>;
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
};
- phy3: ethernet-phy@3 {
- reg = <19>;
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <16>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <17>;
+ };
+
+ phy2: ethernet-phy@2 {
+ reg = <18>;
+ };
+
+ phy3: ethernet-phy@3 {
+ reg = <19>;
+ };
};
- };
- ethernet@70000 {
- status = "okay";
- phy = <&phy0>;
- phy-mode = "rgmii-id";
- };
- ethernet@74000 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "rgmii-id";
- };
- ethernet@30000 {
- status = "okay";
- phy = <&phy2>;
- phy-mode = "rgmii-id";
- };
- ethernet@34000 {
- status = "okay";
- phy = <&phy3>;
- phy-mode = "rgmii-id";
- };
+ ethernet@70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@74000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@30000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@34000 {
+ status = "okay";
+ phy = <&phy3>;
+ phy-mode = "rgmii-id";
+ };
- spi0: spi@10600 {
- status = "okay";
+ spi0: spi@10600 {
+ status = "okay";
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "n25q128a13";
- reg = <0>; /* Chip select 0 */
- spi-max-frequency = <108000000>;
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "n25q128a13";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <108000000>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index 40fa72e..f0d38fb 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -44,37 +44,39 @@
};
soc {
- pinctrl {
- compatible = "marvell,mv78230-pinctrl";
- reg = <0x18000 0x38>;
+ internal-regs {
+ pinctrl {
+ compatible = "marvell,mv78230-pinctrl";
+ reg = <0x18000 0x38>;
- sdio_pins: sdio-pins {
- marvell,pins = "mpp30", "mpp31", "mpp32",
- "mpp33", "mpp34", "mpp35";
- marvell,function = "sd0";
+ sdio_pins: sdio-pins {
+ marvell,pins = "mpp30", "mpp31", "mpp32",
+ "mpp33", "mpp34", "mpp35";
+ marvell,function = "sd0";
+ };
};
- };
- gpio0: gpio@18100 {
- compatible = "marvell,orion-gpio";
- reg = <0x18100 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <82>, <83>, <84>, <85>;
- };
+ gpio0: gpio@18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <82>, <83>, <84>, <85>;
+ };
- gpio1: gpio@18140 {
- compatible = "marvell,orion-gpio";
- reg = <0x18140 0x40>;
- ngpios = <17>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <87>, <88>, <89>;
+ gpio1: gpio@18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <17>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <87>, <88>, <89>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 7578c21..2621bda 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -45,56 +45,58 @@
};
soc {
- pinctrl {
- compatible = "marvell,mv78260-pinctrl";
- reg = <0x18000 0x38>;
+ internal-regs {
+ pinctrl {
+ compatible = "marvell,mv78260-pinctrl";
+ reg = <0x18000 0x38>;
- sdio_pins: sdio-pins {
- marvell,pins = "mpp30", "mpp31", "mpp32",
- "mpp33", "mpp34", "mpp35";
- marvell,function = "sd0";
+ sdio_pins: sdio-pins {
+ marvell,pins = "mpp30", "mpp31", "mpp32",
+ "mpp33", "mpp34", "mpp35";
+ marvell,function = "sd0";
+ };
};
- };
- gpio0: gpio@18100 {
- compatible = "marvell,orion-gpio";
- reg = <0x18100 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <82>, <83>, <84>, <85>;
- };
+ gpio0: gpio@18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <82>, <83>, <84>, <85>;
+ };
- gpio1: gpio@18140 {
- compatible = "marvell,orion-gpio";
- reg = <0x18140 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <87>, <88>, <89>, <90>;
- };
+ gpio1: gpio@18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <87>, <88>, <89>, <90>;
+ };
- gpio2: gpio@18180 {
- compatible = "marvell,orion-gpio";
- reg = <0x18180 0x40>;
- ngpios = <3>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <91>;
- };
+ gpio2: gpio@18180 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18180 0x40>;
+ ngpios = <3>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <91>;
+ };
- ethernet@34000 {
+ ethernet@34000 {
compatible = "marvell,armada-370-neta";
reg = <0x34000 0x2500>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index 5280a4d..ccb95ff 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -60,56 +60,58 @@
};
soc {
- pinctrl {
- compatible = "marvell,mv78460-pinctrl";
- reg = <0x18000 0x38>;
+ internal-regs {
+ pinctrl {
+ compatible = "marvell,mv78460-pinctrl";
+ reg = <0x18000 0x38>;
- sdio_pins: sdio-pins {
- marvell,pins = "mpp30", "mpp31", "mpp32",
- "mpp33", "mpp34", "mpp35";
- marvell,function = "sd0";
+ sdio_pins: sdio-pins {
+ marvell,pins = "mpp30", "mpp31", "mpp32",
+ "mpp33", "mpp34", "mpp35";
+ marvell,function = "sd0";
+ };
};
- };
- gpio0: gpio@18100 {
- compatible = "marvell,orion-gpio";
- reg = <0x18100 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <82>, <83>, <84>, <85>;
- };
+ gpio0: gpio@18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <82>, <83>, <84>, <85>;
+ };
- gpio1: gpio@18140 {
- compatible = "marvell,orion-gpio";
- reg = <0x18140 0x40>;
- ngpios = <32>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <87>, <88>, <89>, <90>;
- };
+ gpio1: gpio@18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <87>, <88>, <89>, <90>;
+ };
- gpio2: gpio@18180 {
- compatible = "marvell,orion-gpio";
- reg = <0x18180 0x40>;
- ngpios = <3>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupts-cells = <2>;
- interrupts = <91>;
- };
+ gpio2: gpio@18180 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18180 0x40>;
+ ngpios = <3>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupts-cells = <2>;
+ interrupts = <91>;
+ };
- ethernet@34000 {
+ ethernet@34000 {
compatible = "marvell,armada-370-neta";
reg = <0x34000 0x2500>;
interrupts = <14>;
clocks = <&gateclk 1>;
status = "disabled";
+ };
};
};
};
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index a7bade4..e2eaf4f 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -27,117 +27,119 @@
};
soc {
- serial@12000 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- serial@12100 {
- clock-frequency = <250000000>;
- status = "okay";
- };
- pinctrl {
- led_pins: led-pins-0 {
- marvell,pins = "mpp49", "mpp51", "mpp53";
- marvell,function = "gpio";
+ internal-regs {
+ serial@12000 {
+ clock-frequency = <250000000>;
+ status = "okay";
};
- };
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins>;
-
- red_led {
- label = "red_led";
- gpios = <&gpio1 17 1>;
- default-state = "off";
+ serial@12100 {
+ clock-frequency = <250000000>;
+ status = "okay";
};
-
- yellow_led {
- label = "yellow_led";
- gpios = <&gpio1 19 1>;
- default-state = "off";
+ pinctrl {
+ led_pins: led-pins-0 {
+ marvell,pins = "mpp49", "mpp51", "mpp53";
+ marvell,function = "gpio";
+ };
};
-
- green_led {
- label = "green_led";
- gpios = <&gpio1 21 1>;
- default-state = "off";
- linux,default-trigger = "heartbeat";
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ red_led {
+ label = "red_led";
+ gpios = <&gpio1 17 1>;
+ default-state = "off";
+ };
+
+ yellow_led {
+ label = "yellow_led";
+ gpios = <&gpio1 19 1>;
+ default-state = "off";
+ };
+
+ green_led {
+ label = "green_led";
+ gpios = <&gpio1 21 1>;
+ default-state = "off";
+ linux,default-trigger = "heartbeat";
+ };
};
- };
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
- button@1 {
- label = "Init Button";
- linux,code = <116>;
- gpios = <&gpio1 28 0>;
+ button@1 {
+ label = "Init Button";
+ linux,code = <116>;
+ gpios = <&gpio1 28 0>;
+ };
};
- };
- mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
- phy1: ethernet-phy@1 {
- reg = <1>;
- };
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
- phy2: ethernet-phy@2 {
- reg = <2>;
- };
+ phy2: ethernet-phy@2 {
+ reg = <2>;
+ };
- phy3: ethernet-phy@3 {
- reg = <3>;
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ };
};
- };
-
- ethernet@70000 {
- status = "okay";
- phy = <&phy0>;
- phy-mode = "sgmii";
- };
- ethernet@74000 {
- status = "okay";
- phy = <&phy1>;
- phy-mode = "sgmii";
- };
- ethernet@30000 {
- status = "okay";
- phy = <&phy2>;
- phy-mode = "sgmii";
- };
- ethernet@34000 {
- status = "okay";
- phy = <&phy3>;
- phy-mode = "sgmii";
- };
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
- };
- i2c@11100 {
- status = "okay";
- clock-frequency = <400000>;
- s35390a: s35390a@30 {
- compatible = "s35390a";
- reg = <0x30>;
+ ethernet@70000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "sgmii";
+ };
+ ethernet@74000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "sgmii";
+ };
+ ethernet@30000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "sgmii";
+ };
+ ethernet@34000 {
+ status = "okay";
+ phy = <&phy3>;
+ phy-mode = "sgmii";
+ };
+ i2c@11000 {
+ status = "okay";
+ clock-frequency = <400000>;
+ };
+ i2c@11100 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ s35390a: s35390a@30 {
+ compatible = "s35390a";
+ reg = <0x30>;
+ };
+ };
+ sata@a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+ usb@50000 {
+ status = "okay";
+ };
+ usb@51000 {
+ status = "okay";
};
- };
- sata@a0000 {
- nr-ports = <2>;
- status = "okay";
- };
- usb@50000 {
- status = "okay";
- };
- usb@51000 {
- status = "okay";
};
};
};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 6ca6b7a..2b39dde 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -22,135 +22,133 @@
model = "Marvell Armada XP family SoC";
compatible = "marvell,armadaxp", "marvell,armada-370-xp";
-
soc {
- L2: l2-cache {
- compatible = "marvell,aurora-system-cache";
- reg = <0x08000 0x1000>;
- cache-id-part = <0x100>;
- wt-override;
- };
+ internal-regs {
+ L2: l2-cache {
+ compatible = "marvell,aurora-system-cache";
+ reg = <0x08000 0x1000>;
+ cache-id-part = <0x100>;
+ wt-override;
+ };
- mpic: interrupt-controller@20000 {
- reg = <0x20a00 0x2d0>,
- <0x21070 0x58>;
- };
+ mpic: interrupt-controller@20000 {
+ reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+ };
- armada-370-xp-pmsu@22000 {
- compatible = "marvell,armada-370-xp-pmsu";
- reg = <0x22100 0x430>,
- <0x20800 0x20>;
- };
+ armada-370-xp-pmsu@22000 {
+ compatible = "marvell,armada-370-xp-pmsu";
+ reg = <0x22100 0x430>, <0x20800 0x20>;
+ };
- serial@12200 {
+ serial@12200 {
compatible = "snps,dw-apb-uart";
reg = <0x12200 0x100>;
reg-shift = <2>;
interrupts = <43>;
reg-io-width = <1>;
status = "disabled";
- };
- serial@12300 {
+ };
+ serial@12300 {
compatible = "snps,dw-apb-uart";
reg = <0x12300 0x100>;
reg-shift = <2>;
interrupts = <44>;
reg-io-width = <1>;
status = "disabled";
- };
+ };
- timer@20300 {
+ timer@20300 {
marvell,timer-25Mhz;
- };
+ };
- coreclk: mvebu-sar@18230 {
- compatible = "marvell,armada-xp-core-clock";
- reg = <0x18230 0x08>;
- #clock-cells = <1>;
- };
+ coreclk: mvebu-sar@18230 {
+ compatible = "marvell,armada-xp-core-clock";
+ reg = <0x18230 0x08>;
+ #clock-cells = <1>;
+ };
- cpuclk: clock-complex@18700 {
- #clock-cells = <1>;
- compatible = "marvell,armada-xp-cpu-clock";
- reg = <0x18700 0xA0>;
- clocks = <&coreclk 1>;
- };
+ cpuclk: clock-complex@18700 {
+ #clock-cells = <1>;
+ compatible = "marvell,armada-xp-cpu-clock";
+ reg = <0x18700 0xA0>;
+ clocks = <&coreclk 1>;
+ };
- gateclk: clock-gating-control@18220 {
- compatible = "marvell,armada-xp-gating-clock";
- reg = <0x18220 0x4>;
- clocks = <&coreclk 0>;
- #clock-cells = <1>;
- };
+ gateclk: clock-gating-control@18220 {
+ compatible = "marvell,armada-xp-gating-clock";
+ reg = <0x18220 0x4>;
+ clocks = <&coreclk 0>;
+ #clock-cells = <1>;
+ };
- system-controller@18200 {
+ system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x500>;
- };
+ };
- ethernet@30000 {
+ ethernet@30000 {
compatible = "marvell,armada-370-neta";
reg = <0x30000 0x2500>;
interrupts = <12>;
clocks = <&gateclk 2>;
status = "disabled";
- };
-
- xor@60900 {
- compatible = "marvell,orion-xor";
- reg = <0x60900 0x100
- 0x60b00 0x100>;
- clocks = <&gateclk 22>;
- status = "okay";
-
- xor10 {
- interrupts = <51>;
- dmacap,memcpy;
- dmacap,xor;
- };
- xor11 {
- interrupts = <52>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
};
- };
-
- xor@f0900 {
- compatible = "marvell,orion-xor";
- reg = <0xF0900 0x100
- 0xF0B00 0x100>;
- clocks = <&gateclk 28>;
- status = "okay";
- xor00 {
- interrupts = <94>;
- dmacap,memcpy;
- dmacap,xor;
+ xor@60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+ clocks = <&gateclk 22>;
+ status = "okay";
+
+ xor10 {
+ interrupts = <51>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor11 {
+ interrupts = <52>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
};
- xor01 {
- interrupts = <95>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
+
+ xor@f0900 {
+ compatible = "marvell,orion-xor";
+ reg = <0xF0900 0x100
+ 0xF0B00 0x100>;
+ clocks = <&gateclk 28>;
+ status = "okay";
+
+ xor00 {
+ interrupts = <94>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <95>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
};
- };
- usb@50000 {
- clocks = <&gateclk 18>;
- };
+ usb@50000 {
+ clocks = <&gateclk 18>;
+ };
- usb@51000 {
- clocks = <&gateclk 19>;
- };
+ usb@51000 {
+ clocks = <&gateclk 19>;
+ };
- usb@52000 {
- compatible = "marvell,orion-ehci";
- reg = <0x52000 0x500>;
- interrupts = <47>;
- clocks = <&gateclk 20>;
- status = "disabled";
+ usb@52000 {
+ compatible = "marvell,orion-ehci";
+ reg = <0x52000 0x500>;
+ interrupts = <47>;
+ clocks = <&gateclk 20>;
+ status = "disabled";
+ };
};
-
};
};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 8/9] arm: dts: mvebu: fix cpus section indentation
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
` (6 preceding siblings ...)
2013-04-05 20:24 ` [PATCH v2 7/9] arm: dts: mvebu: introduce internal-regs node Gregory CLEMENT
@ 2013-04-05 20:24 ` Gregory CLEMENT
[not found] ` <1365193444-13441-9-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-04-05 20:24 ` [PATCH v2 9/9] arm: dts: mvebu: Convert mvebu device tree files to 64 bits Gregory CLEMENT
[not found] ` <1365193444-13441-1-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
9 siblings, 1 reply; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:24 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
arch/arm/boot/dts/armada-xp-mv78230.dtsi | 28 ++++++++--------
arch/arm/boot/dts/armada-xp-mv78260.dtsi | 28 ++++++++--------
arch/arm/boot/dts/armada-xp-mv78460.dtsi | 54 +++++++++++++++---------------
3 files changed, 55 insertions(+), 55 deletions(-)
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index f0d38fb..392f118 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -25,22 +25,22 @@
};
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <0>;
- clocks = <&cpuclk 0>;
- };
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <0>;
+ clocks = <&cpuclk 0>;
+ };
- cpu@1 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <1>;
- clocks = <&cpuclk 1>;
- };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
};
soc {
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index 2621bda..8fb7fea 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -26,22 +26,22 @@
};
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <0>;
- clocks = <&cpuclk 0>;
- };
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <0>;
+ clocks = <&cpuclk 0>;
+ };
- cpu@1 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <1>;
- clocks = <&cpuclk 1>;
- };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
};
soc {
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index ccb95ff..fa665cb 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -27,36 +27,36 @@
cpus {
- #address-cells = <1>;
- #size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <0>;
- clocks = <&cpuclk 0>;
- };
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <0>;
+ clocks = <&cpuclk 0>;
+ };
- cpu@1 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <1>;
- clocks = <&cpuclk 1>;
- };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
- cpu@2 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <2>;
- clocks = <&cpuclk 2>;
- };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <2>;
+ clocks = <&cpuclk 2>;
+ };
- cpu@3 {
- device_type = "cpu";
- compatible = "marvell,sheeva-v7";
- reg = <3>;
- clocks = <&cpuclk 3>;
- };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <3>;
+ clocks = <&cpuclk 3>;
+ };
};
soc {
@@ -114,4 +114,4 @@
};
};
};
- };
+};
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v2 9/9] arm: dts: mvebu: Convert mvebu device tree files to 64 bits
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
` (7 preceding siblings ...)
2013-04-05 20:24 ` [PATCH v2 8/9] arm: dts: mvebu: fix cpus section indentation Gregory CLEMENT
@ 2013-04-05 20:24 ` Gregory CLEMENT
[not found] ` <1365193444-13441-1-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
9 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:24 UTC (permalink / raw)
To: Jason Cooper, Andrew Lunn, Gregory Clement
Cc: Lior Amsalem, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Arnd Bergmann, Jon Masters, devicetree-discuss, Rob Herring,
linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof, Nicolas Pitre,
linux-kernel, Maen Suleiman, Nadav Haklai, Shadi Ammouri
In order to be able to use more than 4GB of RAM when the LPAE is
activated, the dts must be converted in 64 bits.
Armada XP and Armada 370 share a dtsi file which have also be
converted to 64 bits. This lead to convert all the device tree files
to 64 bits even the one used for Armada 370 (which don't support LPAE)
This was heavily based on the work of Lior Amsalem.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
arch/arm/boot/dts/armada-370-db.dts | 2 +-
arch/arm/boot/dts/armada-370-mirabox.dts | 2 +-
arch/arm/boot/dts/armada-370-rd.dts | 2 +-
arch/arm/boot/dts/armada-370-xp.dtsi | 4 ++--
arch/arm/boot/dts/armada-xp-db.dts | 2 +-
arch/arm/boot/dts/armada-xp-gp.dts | 14 ++++++++------
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 2 +-
7 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 6c30a9f..c996c06 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -26,7 +26,7 @@
memory {
device_type = "memory";
- reg = <0x00000000 0x40000000>; /* 1 GB */
+ reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
};
soc {
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
index 5a06e87..29b6b64 100644
--- a/arch/arm/boot/dts/armada-370-mirabox.dts
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -21,7 +21,7 @@
memory {
device_type = "memory";
- reg = <0x00000000 0x20000000>; /* 512 MB */
+ reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
};
soc {
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index 437dcd2..09e75fc 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -24,7 +24,7 @@
memory {
device_type = "memory";
- reg = <0x00000000 0x20000000>; /* 512 MB */
+ reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
};
soc {
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 8b9adc6..6a3b418 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -16,7 +16,7 @@
* 370 and Armada XP SoC.
*/
-/include/ "skeleton.dtsi"
+/include/ "skeleton64.dtsi"
/ {
model = "Marvell Armada 370 and XP SoC";
@@ -33,7 +33,7 @@
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&mpic>;
- ranges = <0 0xd0000000 0x100000>;
+ ranges = <0 0 0xd0000000 0x100000>;
internal-regs {
compatible = "simple-bus";
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index fbd0f04..a2dd24e 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -26,7 +26,7 @@
memory {
device_type = "memory";
- reg = <0x00000000 0x80000000>; /* 2 GB */
+ reg = <0 0x00000000 0 0x80000000>; /* 2 GB */
};
soc {
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts
index b0298d7..b022906 100644
--- a/arch/arm/boot/dts/armada-xp-gp.dts
+++ b/arch/arm/boot/dts/armada-xp-gp.dts
@@ -26,14 +26,16 @@
memory {
device_type = "memory";
-
/*
- * 4 GB of plug-in RAM modules by default but only 3GB
- * are visible, the amount of memory available can be
- * changed by the bootloader according the size of the
- * module actually plugged
+ * 8 GB of plug-in RAM modules by default.The amount
+ * of memory available can be changed by the
+ * bootloader according the size of the module
+ * actually plugged. Only 7GB are usable because
+ * addresses from 0xC0000000 to 0xffffffff are used by
+ * the internal registers of the SoC.
*/
- reg = <0x00000000 0xC0000000>;
+ reg = <0x00000000 0x00000000 0x00000000 0xC0000000>,
+ <0x00000001 0x00000000 0x00000001 0x00000000>;
};
soc {
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index e2eaf4f..1f274e7 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -23,7 +23,7 @@
memory {
device_type = "memory";
- reg = <0x00000000 0xC0000000>; /* 3 GB */
+ reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */
};
soc {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 20+ messages in thread
* Re: [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected
2013-04-05 20:23 ` [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected Gregory CLEMENT
@ 2013-04-05 20:41 ` Arnd Bergmann
2013-04-05 20:59 ` Gregory CLEMENT
0 siblings, 1 reply; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-05 20:41 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On Friday 05 April 2013, Gregory CLEMENT wrote:
> When LPAE is activated on Armada XP, all registers and IOs are still
> 32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
> That means that all the DMA transfer are restricted to the low 32 bits
> address space. This is limitation is achieved by selecting ZONE_DMA.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Shouldn't that be ZONE_DMA32?
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 7/9] arm: dts: mvebu: introduce internal-regs node
[not found] ` <1365193444-13441-8-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
@ 2013-04-05 20:43 ` Arnd Bergmann
2013-04-05 20:48 ` Gregory CLEMENT
0 siblings, 1 reply; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-05 20:43 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, David Marlin, Yehuda Yitschak,
Tawfik Bayouk, Dan Frazier, Eran Ben-Avi, Leif Lindholm,
Sebastian Hesselbarth, Jason Cooper, Nadav Haklai, Jon Masters,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Rob Herring,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Chris Van Hoof,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Maen Suleiman, Shadi Ammouri
On Friday 05 April 2013, Gregory CLEMENT wrote:
> Signed-off-by: Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
The patch looks good but the description is a bit short.
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 8/9] arm: dts: mvebu: fix cpus section indentation
[not found] ` <1365193444-13441-9-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
@ 2013-04-05 20:45 ` Arnd Bergmann
0 siblings, 0 replies; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-05 20:45 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, David Marlin, Yehuda Yitschak,
Tawfik Bayouk, Dan Frazier, Eran Ben-Avi, Leif Lindholm,
Sebastian Hesselbarth, Jason Cooper, Nadav Haklai, Jon Masters,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Rob Herring,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Chris Van Hoof,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Maen Suleiman, Shadi Ammouri
On Friday 05 April 2013, Gregory CLEMENT wrote:
> From: Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
This should have a description, even though it's completely trivial.
I would also recommend moving this patch first, as the general rule
is to do cleanups first.
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs
[not found] ` <1365193444-13441-1-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
@ 2013-04-05 20:46 ` Arnd Bergmann
2013-04-05 21:10 ` Gregory CLEMENT
0 siblings, 1 reply; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-05 20:46 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, David Marlin, Yehuda Yitschak,
Tawfik Bayouk, Dan Frazier, Eran Ben-Avi, Leif Lindholm,
Sebastian Hesselbarth, Jason Cooper, Nadav Haklai, Jon Masters,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ, Rob Herring,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Chris Van Hoof,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Maen Suleiman, Shadi Ammouri
On Friday 05 April 2013, Gregory CLEMENT wrote:
> The Armada XP SoCs have LPAE support. This is the second version patch
> set whixh allow to run kernel on this SoCs with LPAE support.
>
> The biggest changes are the conversion of the device tree file to 64
> bits in order to be able to use more than 4GB of memory (without this
> the LPAE is pointless).
>
The series looks good overall, I've commented on trivial details.
Also, please use "ARM: mvebu: ..." in the subject rather than the lower-case
version.
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 7/9] arm: dts: mvebu: introduce internal-regs node
2013-04-05 20:43 ` Arnd Bergmann
@ 2013-04-05 20:48 ` Gregory CLEMENT
0 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:48 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On 04/05/2013 10:43 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>
> The patch looks good but the description is a bit short.
>
It cannot be more brief! :)
I explained the purpose of this patch in the cover letter and forgot to
add this explanation here.
I will expand it for next version.
Thanks.
> Arnd
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE
2013-04-05 20:23 ` [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE Gregory CLEMENT
@ 2013-04-05 20:50 ` Arnd Bergmann
2013-04-05 21:13 ` Gregory CLEMENT
0 siblings, 1 reply; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-05 20:50 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On Friday 05 April 2013, Gregory CLEMENT wrote:
> From: Lior Amsalem <alior@marvell.com>
>
> In order to be able to support he LPAE, the internal registers virtual
> base must be aligned to 2MB.
>
> Signed-off-by: Lior Amsalem <alior@marvell.com>
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This is a surprising limitation. Can you extend the above text to go into more
detail where that alignment requirement comes from?
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected
2013-04-05 20:41 ` Arnd Bergmann
@ 2013-04-05 20:59 ` Gregory CLEMENT
0 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 20:59 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On 04/05/2013 10:41 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> When LPAE is activated on Armada XP, all registers and IOs are still
>> 32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
>> That means that all the DMA transfer are restricted to the low 32 bits
>> address space. This is limitation is achieved by selecting ZONE_DMA.
>>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>
>
> Shouldn't that be ZONE_DMA32?
>
Well common code for ARM don't manage the ZONE_DMA32. Whereas with
ZONE_DMA, setup_dma_zone() in arch/arm/mm/init.c does exactly what
I want: setting arm_dma_limit to 0xffffffff.
ZONE_DMA32 is used on arm64 however.
> Arnd
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs
2013-04-05 20:46 ` [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Arnd Bergmann
@ 2013-04-05 21:10 ` Gregory CLEMENT
0 siblings, 0 replies; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 21:10 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On 04/05/2013 10:46 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> The Armada XP SoCs have LPAE support. This is the second version patch
>> set whixh allow to run kernel on this SoCs with LPAE support.
>>
>> The biggest changes are the conversion of the device tree file to 64
>> bits in order to be able to use more than 4GB of memory (without this
>> the LPAE is pointless).
>>
>
> The series looks good overall, I've commented on trivial details.
So there is still hope to have this patch set in 3.10 :)
>
> Also, please use "ARM: mvebu: ..." in the subject rather than the lower-case
> version.
OK I will, but I saw a lot of 'arm' written in lower-case int the subject of emails
on the LAKML.
>
> Arnd
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE
2013-04-05 20:50 ` Arnd Bergmann
@ 2013-04-05 21:13 ` Gregory CLEMENT
2013-04-06 8:31 ` Arnd Bergmann
0 siblings, 1 reply; 20+ messages in thread
From: Gregory CLEMENT @ 2013-04-05 21:13 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On 04/05/2013 10:50 PM, Arnd Bergmann wrote:
> On Friday 05 April 2013, Gregory CLEMENT wrote:
>> From: Lior Amsalem <alior@marvell.com>
>>
>> In order to be able to support he LPAE, the internal registers virtual
>> base must be aligned to 2MB.
>>
>> Signed-off-by: Lior Amsalem <alior@marvell.com>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
>
> This is a surprising limitation. Can you extend the above text to go into more
> detail where that alignment requirement comes from?
>
The explanation I had was that in LPAE section size is 2MB, in earlyprintk we map
the internal registers and it must be section aligned.
> Arnd
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE
2013-04-05 21:13 ` Gregory CLEMENT
@ 2013-04-06 8:31 ` Arnd Bergmann
0 siblings, 0 replies; 20+ messages in thread
From: Arnd Bergmann @ 2013-04-06 8:31 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Lior Amsalem, Andrew Lunn, Ike Pan, Grant Likely, David Marlin,
Yehuda Yitschak, Tawfik Bayouk, Dan Frazier, Eran Ben-Avi,
Ezequiel Garcia, Leif Lindholm, Sebastian Hesselbarth,
Jason Cooper, Nadav Haklai, Jon Masters, devicetree-discuss,
Rob Herring, linux-arm-kernel, Thomas Petazzoni, Chris Van Hoof,
Nicolas Pitre, linux-kernel, Maen Suleiman
On Friday 05 April 2013, Gregory CLEMENT wrote:
> On 04/05/2013 10:50 PM, Arnd Bergmann wrote:
> > On Friday 05 April 2013, Gregory CLEMENT wrote:
> >> From: Lior Amsalem <alior@marvell.com>
> >
> > This is a surprising limitation. Can you extend the above text to go into more
> > detail where that alignment requirement comes from?
> >
>
> The explanation I had was that in LPAE section size is 2MB, in earlyprintk we map
> the internal registers and it must be section aligned.
>
Ah, I see. Please put that in the text then.
Arnd
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2013-04-06 8:31 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-04-05 20:23 [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 1/9] arm: mvebu: Limit the DMA zone when LPAE is selected Gregory CLEMENT
2013-04-05 20:41 ` Arnd Bergmann
2013-04-05 20:59 ` Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 2/9] arm: mvebu: Align the internal registers virtual base to support LPAE Gregory CLEMENT
2013-04-05 20:50 ` Arnd Bergmann
2013-04-05 21:13 ` Gregory CLEMENT
2013-04-06 8:31 ` Arnd Bergmann
2013-04-05 20:23 ` [PATCH v2 3/9] arm: mvebu: Enable pj4b on LPAE compilations Gregory CLEMENT
2013-04-05 20:23 ` [PATCH v2 4/9] arm: dts: Add a 64 bits version of the skeleton device tree Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 5/9] arm: dts: mvebu: move all peripherals inside soc Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 6/9] arm: dts: mvebu: Convert all the mvebu files to use the range property Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 7/9] arm: dts: mvebu: introduce internal-regs node Gregory CLEMENT
[not found] ` <1365193444-13441-8-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-04-05 20:43 ` Arnd Bergmann
2013-04-05 20:48 ` Gregory CLEMENT
2013-04-05 20:24 ` [PATCH v2 8/9] arm: dts: mvebu: fix cpus section indentation Gregory CLEMENT
[not found] ` <1365193444-13441-9-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-04-05 20:45 ` Arnd Bergmann
2013-04-05 20:24 ` [PATCH v2 9/9] arm: dts: mvebu: Convert mvebu device tree files to 64 bits Gregory CLEMENT
[not found] ` <1365193444-13441-1-git-send-email-gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2013-04-05 20:46 ` [PATCH v2 0/9] rm: mvebu: Enable LPAE support for Armada XP SoCs Arnd Bergmann
2013-04-05 21:10 ` Gregory CLEMENT
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