[PATCH 1/6] DT: add vendor prefixes for Ralink

[PATCH 1/6] DT: add vendor prefixes for Ralink

[John Crispin]

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 Documentation/devicetree/bindings/vendor-prefixes.txt |    1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 19e1ef7..6527412 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -41,6 +41,7 @@ onnn	ON Semiconductor Corp.
 picochip	Picochip Ltd
 powervr	PowerVR (deprecated, use img)
 qcom	Qualcomm, Inc.
+ralink	Mediatek/Ralink Technology Corp.
 ramtron	Ramtron International
 realtek Realtek Semiconductor Corp.
 renesas	Renesas Electronics Corporation
-- 
1.7.10.4

[PATCH 2/6] DT: add documentation for the Ralink MIPS SoCs

[John Crispin]

From: Gabor Juhos <juhosg@openwrt.org>

This patch adds binding documentation for the
compatible values of the Ralink MIPS SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
 Documentation/devicetree/bindings/mips/ralink.txt |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/ralink.txt

diff --git a/Documentation/devicetree/bindings/mips/ralink.txt b/Documentation/devicetree/bindings/mips/ralink.txt
new file mode 100644
index 0000000..43fc03c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/ralink.txt
@@ -0,0 +1,17 @@
+Ralink MIPS SoC device tree bindings
+
+1. SoCs
+
+Each device tree must specify a compatible value for the Ralink SoC
+it uses in the compatible property of the root node. The compatible
+value must be one of the following values:
+
+  ralink,rt2880-soc
+  ralink,rt3050-soc
+  ralink,rt3052-soc
+  ralink,rt3350-soc
+  ralink,rt3352-soc
+  ralink,rt3883-soc
+  ralink,rt5350-soc
+  ralink,mt7620-soc
+
-- 
1.7.10.4

Re: [PATCH 2/6] DT: add documentation for the Ralink MIPS SoCs

[Gabor Juhos]

2013.04.13. 10:50 keltezéssel, John Crispin írta:
> From: Gabor Juhos <juhosg@openwrt.org>
> 
> This patch adds binding documentation for the
> compatible values of the Ralink MIPS SoCs.
> 
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> ---
>  Documentation/devicetree/bindings/mips/ralink.txt |   17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mips/ralink.txt
> 
> diff --git a/Documentation/devicetree/bindings/mips/ralink.txt b/Documentation/devicetree/bindings/mips/ralink.txt
> new file mode 100644
> index 0000000..43fc03c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/ralink.txt
> @@ -0,0 +1,17 @@
> +Ralink MIPS SoC device tree bindings
> +
> +1. SoCs
> +
> +Each device tree must specify a compatible value for the Ralink SoC
> +it uses in the compatible property of the root node. The compatible
> +value must be one of the following values:
> +
> +  ralink,rt2880-soc
> +  ralink,rt3050-soc
> +  ralink,rt3052-soc
> +  ralink,rt3350-soc
> +  ralink,rt3352-soc
> +  ralink,rt3883-soc
> +  ralink,rt5350-soc
> +  ralink,mt7620-soc

It seems that I was wrong here. We should have separate entries for the MT7620A
and for the MT7620N varians.

-Gabor

[PATCH 3/6] DT: MIPS: ralink: extend RT3050 dtsi and dts file

[John Crispin]

* remove nodes for cores whose drivers are not upstream yet
* add compat string for an additional soc
* fix a whitespace error

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/ralink/dts/rt3050.dtsi     |   52 ++--------------------------------
 arch/mips/ralink/dts/rt3052_eval.dts |    8 ------
 2 files changed, 2 insertions(+), 58 deletions(-)

diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
index 069d066..ef7da1e 100644
--- a/arch/mips/ralink/dts/rt3050.dtsi
+++ b/arch/mips/ralink/dts/rt3050.dtsi
@@ -1,7 +1,7 @@
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
-	compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
+	compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
 
 	cpus {
 		cpu@0 {
@@ -9,10 +9,6 @@
 		};
 	};
 
-	chosen {
-		bootargs = "console=ttyS0,57600 init=/init";
-	};
-
 	cpuintc: cpuintc@0 {
 		#address-cells = <0>;
 		#interrupt-cells = <1>;
@@ -23,7 +19,7 @@
 	palmbus@10000000 {
 		compatible = "palmbus";
 		reg = <0x10000000 0x200000>;
-                ranges = <0x0 0x10000000 0x1FFFFF>;
+		ranges = <0x0 0x10000000 0x1FFFFF>;
 
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -33,11 +29,6 @@
 			reg = <0x0 0x100>;
 		};
 
-		timer@100 {
-			compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
-			reg = <0x100 0x100>;
-		};
-
 		intc: intc@200 {
 			compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
@@ -54,45 +45,6 @@
 			reg = <0x300 0x100>;
 		};
 
-		gpio0: gpio@600 {
-			compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
-			reg = <0x600 0x34>;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			ralink,ngpio = <24>;
-			ralink,regs = [ 00 04 08 0c
-					20 24 28 2c
-					30 34 ];
-		};
-
-		gpio1: gpio@638 {
-			compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
-			reg = <0x638 0x24>;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			ralink,ngpio = <16>;
-			ralink,regs = [ 00 04 08 0c
-					10 14 18 1c
-					20 24 ];
-		};
-
-		gpio2: gpio@660 {
-			compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
-			reg = <0x660 0x24>;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			ralink,ngpio = <12>;
-			ralink,regs = [ 00 04 08 0c
-					10 14 18 1c
-					20 24 ];
-		};
-
 		uartlite@c00 {
 			compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
 			reg = <0xc00 0x100>;
diff --git a/arch/mips/ralink/dts/rt3052_eval.dts b/arch/mips/ralink/dts/rt3052_eval.dts
index 148a590..c566c6c 100644
--- a/arch/mips/ralink/dts/rt3052_eval.dts
+++ b/arch/mips/ralink/dts/rt3052_eval.dts
@@ -12,14 +12,6 @@
 		reg = <0x0 0x2000000>;
 	};
 
-	palmbus@10000000 {
-		sysc@0 {
-			ralink,pinmmux = "uartlite", "spi";
-			ralink,uartmux = "gpio";
-			ralink,wdtmux = <0>;
-		};
-	};
-
 	cfi@1f000000 {
 		compatible = "cfi-flash";
 		reg = <0x1f000000 0x800000>;
-- 
1.7.10.4

Re: [PATCH 3/6] DT: MIPS: ralink: extend RT3050 dtsi and dts file

[Sergei Shtylyov]

Hello.

On 13-04-2013 12:50, John Crispin wrote:

> * remove nodes for cores whose drivers are not upstream yet

    And you call that "extend"? :-)

> * add compat string for an additional soc
> * fix a whitespace error

> Signed-off-by: John Crispin <blogic@openwrt.org>

WBR, Sergei

[PATCH 4/6] DT: MIPS: ralink: add RT2880 dts files

[John Crispin]

Add a dtsi file for RT2880 SoC and a sample dts file.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/ralink/Kconfig             |    4 +++
 arch/mips/ralink/dts/Makefile        |    1 +
 arch/mips/ralink/dts/rt2880.dtsi     |   58 ++++++++++++++++++++++++++++++++++
 arch/mips/ralink/dts/rt2880_eval.dts |   48 ++++++++++++++++++++++++++++
 4 files changed, 111 insertions(+)
 create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
 create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 86f6c77..2f6fbb8 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -34,6 +34,10 @@ choice
 	config DTB_RT_NONE
 		bool "None"
 
+	config DTB_RT2880_EVAL
+		bool "RT2880 eval kit"
+		depends on SOC_RT288X
+
 	config DTB_RT305X_EVAL
 		bool "RT305x eval kit"
 		depends on SOC_RT305X
diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
index 1a69fb3..f635a01 100644
--- a/arch/mips/ralink/dts/Makefile
+++ b/arch/mips/ralink/dts/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
new file mode 100644
index 0000000..182afde
--- /dev/null
+++ b/arch/mips/ralink/dts/rt2880.dtsi
@@ -0,0 +1,58 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ralink,rt2880-soc";
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips4KEc";
+		};
+	};
+
+	cpuintc: cpuintc@0 {
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		compatible = "mti,cpu-interrupt-controller";
+	};
+
+	palmbus@300000 {
+		compatible = "palmbus";
+		reg = <0x300000 0x200000>;
+                ranges = <0x0 0x300000 0x1FFFFF>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysc@0 {
+			compatible = "ralink,rt2880-sysc";
+			reg = <0x0 0x100>;
+		};
+
+		intc: intc@200 {
+			compatible = "ralink,rt2880-intc";
+			reg = <0x200 0x100>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+		};
+
+		memc@300 {
+			compatible = "ralink,rt2880-memc";
+			reg = <0x300 0x100>;
+		};
+
+		uartlite@c00 {
+			compatible = "ralink,rt2880-uart", "ns16550a";
+			reg = <0xc00 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <8>;
+
+			reg-shift = <2>;
+		};
+	};
+};
diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
new file mode 100644
index 0000000..e967b43
--- /dev/null
+++ b/arch/mips/ralink/dts/rt2880_eval.dts
@@ -0,0 +1,48 @@
+/dts-v1/;
+
+/include/ "rt2880.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
+	model = "Ralink RT2880 evaluation board";
+
+	memory@0 {
+		reg = <0x8000000 0x2000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	cfi@1f000000 {
+		compatible = "cfi-flash";
+		reg = <0x1f000000 0x400000>;
+
+		bank-width = <2>;
+		device-width = <2>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "uboot";
+			reg = <0x0 0x30000>;
+			read-only;
+		};
+		partition@30000 {
+			label = "uboot-env";
+			reg = <0x30000 0x10000>;
+			read-only;
+		};
+		partition@40000 {
+			label = "calibration";
+			reg = <0x40000 0x10000>;
+			read-only;
+		};
+		partition@50000 {
+			label = "linux";
+			reg = <0x50000 0x3b0000>;
+		};
+	};
+};
-- 
1.7.10.4

Re: [PATCH 4/6] DT: MIPS: ralink: add RT2880 dts files

[Gabor Juhos]

2013.04.13. 10:50 keltezéssel, John Crispin írta:
> Add a dtsi file for RT2880 SoC and a sample dts file.
> 
> Signed-off-by: John Crispin <blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
> ---
>  arch/mips/ralink/Kconfig             |    4 +++
>  arch/mips/ralink/dts/Makefile        |    1 +
>  arch/mips/ralink/dts/rt2880.dtsi     |   58 ++++++++++++++++++++++++++++++++++
>  arch/mips/ralink/dts/rt2880_eval.dts |   48 ++++++++++++++++++++++++++++
>  4 files changed, 111 insertions(+)
>  create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
>  create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
> 
> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> index 86f6c77..2f6fbb8 100644
> --- a/arch/mips/ralink/Kconfig
> +++ b/arch/mips/ralink/Kconfig
> @@ -34,6 +34,10 @@ choice
>  	config DTB_RT_NONE
>  		bool "None"
>  
> +	config DTB_RT2880_EVAL
> +		bool "RT2880 eval kit"
> +		depends on SOC_RT288X
> +
>  	config DTB_RT305X_EVAL
>  		bool "RT305x eval kit"
>  		depends on SOC_RT305X
> diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
> index 1a69fb3..f635a01 100644
> --- a/arch/mips/ralink/dts/Makefile
> +++ b/arch/mips/ralink/dts/Makefile
> @@ -1 +1,2 @@
> +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
>  obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
> diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
> new file mode 100644
> index 0000000..182afde
> --- /dev/null
> +++ b/arch/mips/ralink/dts/rt2880.dtsi
> @@ -0,0 +1,58 @@
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "ralink,rt2880-soc";
> +
> +	cpus {
> +		cpu@0 {
> +			compatible = "mips,mips4KEc";
> +		};
> +	};
> +
> +	cpuintc: cpuintc@0 {
> +		#address-cells = <0>;
> +		#interrupt-cells = <1>;
> +		interrupt-controller;
> +		compatible = "mti,cpu-interrupt-controller";
> +	};
> +
> +	palmbus@300000 {
> +		compatible = "palmbus";
> +		reg = <0x300000 0x200000>;
> +                ranges = <0x0 0x300000 0x1FFFFF>;
> +
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		sysc@0 {
> +			compatible = "ralink,rt2880-sysc";
> +			reg = <0x0 0x100>;
> +		};
> +
> +		intc: intc@200 {
> +			compatible = "ralink,rt2880-intc";
> +			reg = <0x200 0x100>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <1>;
> +
> +			interrupt-parent = <&cpuintc>;
> +			interrupts = <2>;
> +		};
> +
> +		memc@300 {
> +			compatible = "ralink,rt2880-memc";
> +			reg = <0x300 0x100>;
> +		};
> +
> +		uartlite@c00 {
> +			compatible = "ralink,rt2880-uart", "ns16550a";
> +			reg = <0xc00 0x100>;
> +
> +			interrupt-parent = <&intc>;
> +			interrupts = <8>;
> +
> +			reg-shift = <2>;
> +		};
> +	};
> +};
> diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
> new file mode 100644
> index 0000000..e967b43
> --- /dev/null
> +++ b/arch/mips/ralink/dts/rt2880_eval.dts
> @@ -0,0 +1,48 @@
> +/dts-v1/;
> +
> +/include/ "rt2880.dtsi"
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;

These -cells properties are superfluous, because the rt2880.dtsi file contains
these already.

-Gabor

Re: [PATCH 4/6] DT: MIPS: ralink: add RT2880 dts files

[Sergei Shtylyov]

On 04/13/2013 12:50 PM, John Crispin wrote:

> Add a dtsi file for RT2880 SoC and a sample dts file.

    You forgot to mention Kconfig entry...

> Signed-off-by: John Crispin <blogic@openwrt.org>
[...]

> diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
> index 1a69fb3..f635a01 100644
> --- a/arch/mips/ralink/dts/Makefile
> +++ b/arch/mips/ralink/dts/Makefile
> @@ -1 +1,2 @@
> +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
>   obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
> diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
> new file mode 100644
> index 0000000..182afde
> --- /dev/null
> +++ b/arch/mips/ralink/dts/rt2880.dtsi
> @@ -0,0 +1,58 @@
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "ralink,rt2880-soc";
> +
> +	cpus {
> +		cpu@0 {
> +			compatible = "mips,mips4KEc";
> +		};
> +	};
> +
> +	cpuintc: cpuintc@0 {

    According to ePAPR spec [1], the node name should be "interrupt-controller".

> +		#address-cells = <0>;
> +		#interrupt-cells = <1>;
> +		interrupt-controller;
> +		compatible = "mti,cpu-interrupt-controller";

    So, it's "mips" or "mti"?

> +	};
> +
> +	palmbus@300000 {
> +		compatible = "palmbus";
> +		reg = <0x300000 0x200000>;
> +                ranges = <0x0 0x300000 0x1FFFFF>;
> +
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		sysc@0 {

    Perhaps "system-controller" to be in the same vein with other correct 
naming I'm saying about?

> +			compatible = "ralink,rt2880-sysc";
> +			reg = <0x0 0x100>;
> +		};
> +
> +		intc: intc@200 {

    According to ePAPR spec [1], the node name should be "interrupt-controller".

> +			compatible = "ralink,rt2880-intc";
> +			reg = <0x200 0x100>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <1>;
> +
> +			interrupt-parent = <&cpuintc>;
> +			interrupts = <2>;
> +		};
> +
> +		memc@300 {

    According to ePAPR spec [1], the node name should be "memory-controller".

> +			compatible = "ralink,rt2880-memc";
> +			reg = <0x300 0x100>;
> +		};
> +
> +		uartlite@c00 {

    According to ePAPR spec [1], the node name should be "serial".

[...]
> diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
> new file mode 100644
> index 0000000..e967b43
> --- /dev/null
> +++ b/arch/mips/ralink/dts/rt2880_eval.dts
> @@ -0,0 +1,48 @@
> +/dts-v1/;
> +
> +/include/ "rt2880.dtsi"
> +
> +/ {
[...]
> +	cfi@1f000000 {

    According to ePAPR spec [1], the node name should be "flash".

[1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf

WBR, Sergei

Re: [PATCH 4/6] DT: MIPS: ralink: add RT2880 dts files

[Sergei Shtylyov]

On 08/23/2013 10:34 PM, Sergei Shtylyov wrote:
> On 04/13/2013 12:50 PM, John Crispin wrote:

>> Add a dtsi file for RT2880 SoC and a sample dts file.

>     You forgot to mention Kconfig entry...

    Hm, didn't notice I was replying to the mail from April until it was too 
late. :-)

WBR, Sergei

Re: [PATCH 4/6] DT: MIPS: ralink: add RT2880 dts files

[David Daney]

On 08/23/2013 11:34 AM, Sergei Shtylyov wrote:
> On 04/13/2013 12:50 PM, John Crispin wrote:
>
>> Add a dtsi file for RT2880 SoC and a sample dts file.
>
>     You forgot to mention Kconfig entry...
>
>> Signed-off-by: John Crispin <blogic@openwrt.org>
> [...]
>
>> diff --git a/arch/mips/ralink/dts/Makefile
>> b/arch/mips/ralink/dts/Makefile
>> index 1a69fb3..f635a01 100644
>> --- a/arch/mips/ralink/dts/Makefile
>> +++ b/arch/mips/ralink/dts/Makefile
>> @@ -1 +1,2 @@
>> +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
>>   obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
>> diff --git a/arch/mips/ralink/dts/rt2880.dtsi
>> b/arch/mips/ralink/dts/rt2880.dtsi
>> new file mode 100644
>> index 0000000..182afde
>> --- /dev/null
>> +++ b/arch/mips/ralink/dts/rt2880.dtsi
>> @@ -0,0 +1,58 @@
>> +/ {
>> +    #address-cells = <1>;
>> +    #size-cells = <1>;
>> +    compatible = "ralink,rt2880-soc";
>> +
>> +    cpus {
>> +        cpu@0 {
>> +            compatible = "mips,mips4KEc";
>> +        };
>> +    };
>> +
>> +    cpuintc: cpuintc@0 {
>
>     According to ePAPR spec [1], the node name should be
> "interrupt-controller".
>
>> +        #address-cells = <0>;
>> +        #interrupt-cells = <1>;
>> +        interrupt-controller;
>> +        compatible = "mti,cpu-interrupt-controller";
>
>     So, it's "mips" or "mti"?

I agree that it should be consistent.  vendor-prefixes.txt doesn't have 
an entry for MIPS, so ...

Isn't this the CP0 interrupt controller?  I wonder if something like:

"mips,r4k-cp0-interrupt-controller" might be more descriptive.

David Daney

[PATCH 5/6] DT: MIPS: ralink: add RT3883 dts files

[John Crispin]

Add a dtsi file for RT3883 SoC and a sample dts file.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/ralink/Kconfig             |    4 +++
 arch/mips/ralink/dts/Makefile        |    1 +
 arch/mips/ralink/dts/rt3883.dtsi     |   58 ++++++++++++++++++++++++++++++++++
 arch/mips/ralink/dts/rt3883_eval.dts |   18 +++++++++++
 4 files changed, 81 insertions(+)
 create mode 100644 arch/mips/ralink/dts/rt3883.dtsi
 create mode 100644 arch/mips/ralink/dts/rt3883_eval.dts

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 2f6fbb8..493411f 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -42,6 +42,10 @@ choice
 		bool "RT305x eval kit"
 		depends on SOC_RT305X
 
+	config DTB_RT3883_EVAL
+		bool "RT3883 eval kit"
+		depends on SOC_RT3883
+
 endchoice
 
 endif
diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
index f635a01..040a986 100644
--- a/arch/mips/ralink/dts/Makefile
+++ b/arch/mips/ralink/dts/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
+obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
diff --git a/arch/mips/ralink/dts/rt3883.dtsi b/arch/mips/ralink/dts/rt3883.dtsi
new file mode 100644
index 0000000..3b131dd
--- /dev/null
+++ b/arch/mips/ralink/dts/rt3883.dtsi
@@ -0,0 +1,58 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ralink,rt3883-soc";
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips74Kc";
+		};
+	};
+
+	cpuintc: cpuintc@0 {
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		compatible = "mti,cpu-interrupt-controller";
+	};
+
+	palmbus@10000000 {
+		compatible = "palmbus";
+		reg = <0x10000000 0x200000>;
+		ranges = <0x0 0x10000000 0x1FFFFF>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysc@0 {
+			compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
+			reg = <0x0 0x100>;
+		};
+
+		intc: intc@200 {
+			compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
+			reg = <0x200 0x100>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+		};
+
+		memc@300 {
+			compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
+			reg = <0x300 0x100>;
+		};
+
+		uartlite@c00 {
+			compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
+			reg = <0xc00 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <12>;
+
+			reg-shift = <2>;
+		};
+	};
+};
diff --git a/arch/mips/ralink/dts/rt3883_eval.dts b/arch/mips/ralink/dts/rt3883_eval.dts
new file mode 100644
index 0000000..0297f20
--- /dev/null
+++ b/arch/mips/ralink/dts/rt3883_eval.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+
+/include/ "rt3883.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ralink,rt3883-eval-board", "ralink,rt3883-soc";
+	model = "Ralink RT3883 evaluation board";
+
+	memory@0 {
+		reg = <0x0 0x2000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+};
-- 
1.7.10.4

Re: [PATCH 5/6] DT: MIPS: ralink: add RT3883 dts files

[Gabor Juhos]

2013.04.13. 10:50 keltezéssel, John Crispin írta:
> Add a dtsi file for RT3883 SoC and a sample dts file.
> 
> Signed-off-by: John Crispin <blogic-p3rKhJxN3npAfugRpC6u6w@public.gmane.org>
> ---
>  arch/mips/ralink/Kconfig             |    4 +++
>  arch/mips/ralink/dts/Makefile        |    1 +
>  arch/mips/ralink/dts/rt3883.dtsi     |   58 ++++++++++++++++++++++++++++++++++
>  arch/mips/ralink/dts/rt3883_eval.dts |   18 +++++++++++
>  4 files changed, 81 insertions(+)
>  create mode 100644 arch/mips/ralink/dts/rt3883.dtsi
>  create mode 100644 arch/mips/ralink/dts/rt3883_eval.dts

<...>

> diff --git a/arch/mips/ralink/dts/rt3883.dtsi b/arch/mips/ralink/dts/rt3883.dtsi
> new file mode 100644
> index 0000000..3b131dd
> --- /dev/null
> +++ b/arch/mips/ralink/dts/rt3883.dtsi
> @@ -0,0 +1,58 @@
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "ralink,rt3883-soc";
> +

<...>

> diff --git a/arch/mips/ralink/dts/rt3883_eval.dts b/arch/mips/ralink/dts/rt3883_eval.dts
> new file mode 100644
> index 0000000..0297f20
> --- /dev/null
> +++ b/arch/mips/ralink/dts/rt3883_eval.dts
> @@ -0,0 +1,18 @@
> +/dts-v1/;
> +
> +/include/ "rt3883.dtsi"
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;

These -cells properties are superfluous, because the rt3883.dtsi file contains
these already.

-Gabor

[PATCH 6/6] DT: MIPS: ralink: add MT7620 dts files

[John Crispin]

Add a dtsi file for MT7620 SoC and a sample dts file.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 arch/mips/ralink/Kconfig             |    4 +++
 arch/mips/ralink/dts/Makefile        |    1 +
 arch/mips/ralink/dts/mt7620.dtsi     |   58 ++++++++++++++++++++++++++++++++++
 arch/mips/ralink/dts/mt7620_eval.dts |   18 +++++++++++
 4 files changed, 81 insertions(+)
 create mode 100644 arch/mips/ralink/dts/mt7620.dtsi
 create mode 100644 arch/mips/ralink/dts/mt7620_eval.dts

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 493411f..8254502 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -46,6 +46,10 @@ choice
 		bool "RT3883 eval kit"
 		depends on SOC_RT3883
 
+	config DTB_MT7620_EVAL
+		bool "MT7620 eval kit"
+		depends on SOC_MT7620
+
 endchoice
 
 endif
diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
index 040a986..036603a 100644
--- a/arch/mips/ralink/dts/Makefile
+++ b/arch/mips/ralink/dts/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
+obj-$(CONFIG_DTB_MT7620_EVAL) := mt7620_eval.dtb.o
diff --git a/arch/mips/ralink/dts/mt7620.dtsi b/arch/mips/ralink/dts/mt7620.dtsi
new file mode 100644
index 0000000..5087c57
--- /dev/null
+++ b/arch/mips/ralink/dts/mt7620.dtsi
@@ -0,0 +1,58 @@
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ralink,mtk7620n-soc", "ralink,mt7620-soc";
+
+	cpus {
+		cpu@0 {
+			compatible = "mips,mips24KEc";
+		};
+	};
+
+	cpuintc: cpuintc@0 {
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		compatible = "mti,cpu-interrupt-controller";
+	};
+
+	palmbus@10000000 {
+		compatible = "palmbus";
+		reg = <0x10000000 0x200000>;
+                ranges = <0x0 0x10000000 0x1FFFFF>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		sysc@0 {
+			compatible = "ralink,mt7620-sysc", "ralink,mt7620n-sysc";
+			reg = <0x0 0x100>;
+		};
+
+		intc: intc@200 {
+			compatible = "ralink,mt7620-intc", "ralink,rt2880-intc";
+			reg = <0x200 0x100>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpuintc>;
+			interrupts = <2>;
+		};
+
+		memc@300 {
+			compatible = "ralink,mt7620-memc", "ralink,rt3050-memc";
+			reg = <0x300 0x100>;
+		};
+
+		uartlite@c00 {
+			compatible = "ralink,mt7620-uart", "ralink,rt2880-uart", "ns16550a";
+			reg = <0xc00 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <12>;
+
+			reg-shift = <2>;
+		};
+	};
+};
diff --git a/arch/mips/ralink/dts/mt7620_eval.dts b/arch/mips/ralink/dts/mt7620_eval.dts
new file mode 100644
index 0000000..72dec59
--- /dev/null
+++ b/arch/mips/ralink/dts/mt7620_eval.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+
+/include/ "mt7620.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
+	model = "Ralink MT7620 evaluation board";
+
+	memory@0 {
+		reg = <0x0 0x4000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+};
-- 
1.7.10.4

Re: [PATCH 6/6] DT: MIPS: ralink: add MT7620 dts files

[Gabor Juhos]

2013.04.13. 10:50 keltezéssel, John Crispin írta:
> Add a dtsi file for MT7620 SoC and a sample dts file.
> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> ---
>  arch/mips/ralink/Kconfig             |    4 +++
>  arch/mips/ralink/dts/Makefile        |    1 +
>  arch/mips/ralink/dts/mt7620.dtsi     |   58 ++++++++++++++++++++++++++++++++++
>  arch/mips/ralink/dts/mt7620_eval.dts |   18 +++++++++++
>  4 files changed, 81 insertions(+)
>  create mode 100644 arch/mips/ralink/dts/mt7620.dtsi
>  create mode 100644 arch/mips/ralink/dts/mt7620_eval.dts
> 
> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> index 493411f..8254502 100644
> --- a/arch/mips/ralink/Kconfig
> +++ b/arch/mips/ralink/Kconfig
> @@ -46,6 +46,10 @@ choice
>  		bool "RT3883 eval kit"
>  		depends on SOC_RT3883
>  
> +	config DTB_MT7620_EVAL
> +		bool "MT7620 eval kit"

To be precise, this is a MT7620A based evaluation board. Both the config symbol
and the prompt should reflect that IMO.

> +		depends on SOC_MT7620
> +
>  endchoice
>  
>  endif
> diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
> index 040a986..036603a 100644
> --- a/arch/mips/ralink/dts/Makefile
> +++ b/arch/mips/ralink/dts/Makefile
> @@ -1,3 +1,4 @@
>  obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
>  obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
>  obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
> +obj-$(CONFIG_DTB_MT7620_EVAL) := mt7620_eval.dtb.o
> diff --git a/arch/mips/ralink/dts/mt7620.dtsi b/arch/mips/ralink/dts/mt7620.dtsi
> new file mode 100644
> index 0000000..5087c57
> --- /dev/null
> +++ b/arch/mips/ralink/dts/mt7620.dtsi
> @@ -0,0 +1,58 @@
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "ralink,mtk7620n-soc", "ralink,mt7620-soc";

This does not match with the actual MT7620 code. That uses "ralink,mt7620n-soc"
and "ralink,mt7620a-soc" values. Ideally, we should have separate dtsi files for
the two SoCs. Additionally, the compatible property of the root node will be
overwritten in the board specific dts files so adding that to the dtsi file
seems superfluous.

> +
> +	cpus {
> +		cpu@0 {
> +			compatible = "mips,mips24KEc";
> +		};
> +	};
> +
> +	cpuintc: cpuintc@0 {
> +		#address-cells = <0>;
> +		#interrupt-cells = <1>;
> +		interrupt-controller;
> +		compatible = "mti,cpu-interrupt-controller";
> +	};
> +
> +	palmbus@10000000 {
> +		compatible = "palmbus";
> +		reg = <0x10000000 0x200000>;
> +                ranges = <0x0 0x10000000 0x1FFFFF>;
> +
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		sysc@0 {
> +			compatible = "ralink,mt7620-sysc", "ralink,mt7620n-sysc";

The 'mt7620-' prefix is a wildcard, either 'mt7620n-' or 'mt7620a-' should be
used instead. This applies to the following nodes as well.

> +			reg = <0x0 0x100>;
> +		};
> +
> +		intc: intc@200 {
> +			compatible = "ralink,mt7620-intc", "ralink,rt2880-intc";
> +			reg = <0x200 0x100>;
> +
> +			interrupt-controller;
> +			#interrupt-cells = <1>;
> +
> +			interrupt-parent = <&cpuintc>;
> +			interrupts = <2>;
> +		};
> +
> +		memc@300 {
> +			compatible = "ralink,mt7620-memc", "ralink,rt3050-memc";
> +			reg = <0x300 0x100>;
> +		};
> +
> +		uartlite@c00 {
> +			compatible = "ralink,mt7620-uart", "ralink,rt2880-uart", "ns16550a";
> +			reg = <0xc00 0x100>;
> +
> +			interrupt-parent = <&intc>;
> +			interrupts = <12>;
> +
> +			reg-shift = <2>;
> +		};
> +	};
> +};
> diff --git a/arch/mips/ralink/dts/mt7620_eval.dts b/arch/mips/ralink/dts/mt7620_eval.dts
> new file mode 100644
> index 0000000..72dec59
> --- /dev/null
> +++ b/arch/mips/ralink/dts/mt7620_eval.dts

The DTS file describes an evaluation board with a MT7620A SoC, the file name
should be changed to reflect that. It would help to avoid confusion if we want
to add another DTS file for a MT7620N based evaluation board later.

> @@ -0,0 +1,18 @@
> +/dts-v1/;
> +
> +/include/ "mt7620.dtsi"
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
> +	model = "Ralink MT7620 evaluation board";

s/MT7620/MT7620A/

> +
> +	memory@0 {
> +		reg = <0x0 0x4000000>;
> +	};
> +
> +	chosen {
> +		bootargs = "console=ttyS0,57600";
> +	};
> +};
> 

-Gabor