From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nicolas Ferre Subject: Re: [PATCH 5/8] ARM: at91: sam9g45: add lcd support Date: Tue, 16 Apr 2013 15:57:06 +0200 Message-ID: <516D58B2.7010305@atmel.com> References: <20130411145741.GB25242@game.jcrosoft.org> <1365692422-9565-1-git-send-email-plagnioj@jcrosoft.com> <1365692422-9565-5-git-send-email-plagnioj@jcrosoft.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1365692422-9565-5-git-send-email-plagnioj@jcrosoft.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Jean-Christophe PLAGNIOL-VILLARD Cc: devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org On 04/11/2013 05:00 PM, Jean-Christophe PLAGNIOL-VILLARD : > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD > Cc: Nicolas Ferre > --- > arch/arm/boot/dts/at91sam9g45.dtsi | 47 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi > index 6b1d4ca..ab8a8fc 100644 > --- a/arch/arm/boot/dts/at91sam9g45.dtsi > +++ b/arch/arm/boot/dts/at91sam9g45.dtsi > @@ -322,6 +322,42 @@ > }; > }; > > + fb { > + pinctrl_fb: fb-0 { > + atmel,pins = > + <4 0 0x1 0x0 /* PE0 periph A */ > + 4 2 0x1 0x0 /* PE2 periph A */ > + 4 3 0x1 0x0 /* PE3 periph A */ > + 4 4 0x1 0x0 /* PE4 periph A */ > + 4 5 0x1 0x0 /* PE5 periph A */ > + 4 6 0x1 0x0 /* PE6 periph A */ > + 4 7 0x1 0x0 /* PE7 periph A */ > + 4 8 0x1 0x0 /* PE8 periph A */ > + 4 9 0x1 0x0 /* PE9 periph A */ > + 4 10 0x1 0x0 /* PE10 periph A */ > + 4 11 0x1 0x0 /* PE11 periph A */ > + 4 12 0x1 0x0 /* PE12 periph A */ > + 4 13 0x1 0x0 /* PE13 periph A */ > + 4 14 0x1 0x0 /* PE14 periph A */ > + 4 15 0x1 0x0 /* PE15 periph A */ > + 4 16 0x1 0x0 /* PE16 periph A */ > + 4 17 0x1 0x0 /* PE17 periph A */ > + 4 18 0x1 0x0 /* PE18 periph A */ > + 4 19 0x1 0x0 /* PE19 periph A */ > + 4 20 0x1 0x0 /* PE20 periph A */ > + 4 21 0x1 0x0 /* PE21 periph A */ > + 4 22 0x1 0x0 /* PE22 periph A */ > + 4 23 0x1 0x0 /* PE23 periph A */ > + 4 24 0x1 0x0 /* PE24 periph A */ > + 4 25 0x1 0x0 /* PE25 periph A */ > + 4 26 0x1 0x0 /* PE26 periph A */ > + 4 27 0x1 0x0 /* PE27 periph A */ > + 4 28 0x1 0x0 /* PE28 periph A */ > + 4 29 0x1 0x0 /* PE29 periph A */ > + 4 30 0x1 0x0>; /* PE30 periph A */ Verified, correct. > + }; > + }; > + > pioA: gpio@fffff200 { > compatible = "atmel,at91rm9200-gpio"; > reg = <0xfffff200 0x200>; > @@ -533,6 +569,17 @@ > }; > }; > > + fb0: fb@0x00500000 { > + compatible = "atmel,at91sam9g45-lcdc"; If we change to "atmel,at91sam9g45-lcdfb", we will have to change this as-well. > + reg = <0x00500000 0x1000>; > + interrupts = <23 3 0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fb>; > + status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; I do not think we need these 2 properties: is a "reg" property existing in child nodes? > + }; > + > nand0: nand@40000000 { > compatible = "atmel,at91rm9200-nand"; > #address-cells = <1>; > -- Nicolas Ferre