* [PATCH] ARM: OMAP2+: Allow NAND transfer mode to be specified in DT
@ 2013-04-19 20:08 Mark Jackson
2013-05-15 5:28 ` Gupta, Pekon
0 siblings, 1 reply; 2+ messages in thread
From: Mark Jackson @ 2013-04-19 20:08 UTC (permalink / raw)
To: linux-omap@vger.kernel.org; +Cc: b-cousson, tony, devicetree-discuss
OMAP devices support various NAND transfer modes.
Currently all device-tree definitions will use the default "prefetch
polled" mode, so this patch enables the transfer mode to be specified
in the device-tree.
---
.../devicetree/bindings/mtd/gpmc-nand.txt | 8 ++++++++
arch/arm/mach-omap2/gpmc.c | 14 ++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index e7f8d7e..cd4a19b 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -29,6 +29,13 @@ Optional properties:
"bch4" 4-bit BCH ecc code
"bch8" 8-bit BCH ecc code
+ - ti,nand-xfer-type: A string setting the data transfer type. One of:
+
+ "prefetch-polled" Prefetch polled mode (default)
+ "polled" Polled mode, without prefetch
+ "prefetch-dma" Prefetch enabled sDMA mode
+ "prefetch-irq" Prefetch enabled irq mode
+
- elm_id: Specifies elm device node. This is required to support BCH
error correction using ELM module.
@@ -55,6 +62,7 @@ Example for an AM33xx board:
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
+ ti,nand-xfer-type = "polled";
gpmc,sync-clk = <0>;
gpmc,cs-on = <0>;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 410e1ba..2f47f76 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1212,6 +1212,13 @@ static const char * const nand_ecc_opts[] = {
[OMAP_ECC_BCH8_CODE_HW] = "bch8",
};
+static const char * const nand_xfer_types[] = {
+ [NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled",
+ [NAND_OMAP_POLLED] = "polled",
+ [NAND_OMAP_PREFETCH_DMA] = "prefetch-dma",
+ [NAND_OMAP_PREFETCH_IRQ] = "prefetch-irq",
+};
+
static int gpmc_probe_nand_child(struct platform_device *pdev,
struct device_node *child)
{
@@ -1241,6 +1248,13 @@ static int gpmc_probe_nand_child(struct
platform_device *pdev,
break;
}
+ if (!of_property_read_string(child, "ti,nand-xfer-type", &s))
+ for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++)
+ if (!strcasecmp(s, nand_xfer_types[val])) {
+ gpmc_nand_data->xfer_type = val;
+ break;
+ }
+
val = of_get_nand_bus_width(child);
if (val == 16)
gpmc_nand_data->devsize = NAND_BUSWIDTH_16;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 2+ messages in thread
* RE: [PATCH] ARM: OMAP2+: Allow NAND transfer mode to be specified in DT
2013-04-19 20:08 [PATCH] ARM: OMAP2+: Allow NAND transfer mode to be specified in DT Mark Jackson
@ 2013-05-15 5:28 ` Gupta, Pekon
0 siblings, 0 replies; 2+ messages in thread
From: Gupta, Pekon @ 2013-05-15 5:28 UTC (permalink / raw)
To: Mark Jackson, linux-omap@vger.kernel.org
Cc: Cousson, Benoit, tony@atomide.com,
devicetree-discuss@lists.ozlabs.org
Acked-by: Pekon Gupta <pekon@ti.com>
> OMAP devices support various NAND transfer modes.
>
> Currently all device-tree definitions will use the default "prefetch
> polled" mode, so this patch enables the transfer mode to be specified
> in the device-tree.
> ---
> .../devicetree/bindings/mtd/gpmc-nand.txt | 8 ++++++++
> arch/arm/mach-omap2/gpmc.c | 14 ++++++++++++++
> 2 files changed, 22 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> index e7f8d7e..cd4a19b 100644
> --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> @@ -29,6 +29,13 @@ Optional properties:
> "bch4" 4-bit BCH ecc code
> "bch8" 8-bit BCH ecc code
>
> + - ti,nand-xfer-type: A string setting the data transfer type.
> One of:
> +
> + "prefetch-polled" Prefetch polled mode (default)
> + "polled" Polled mode, without prefetch
> + "prefetch-dma" Prefetch enabled sDMA
> mode
> + "prefetch-irq" Prefetch enabled irq mode
> +
> - elm_id: Specifies elm device node. This is required to support
> BCH
> error correction using ELM module.
>
> @@ -55,6 +62,7 @@ Example for an AM33xx board:
> reg = <0 0 0>; /* CS0, offset 0 */
> nand-bus-width = <16>;
> ti,nand-ecc-opt = "bch8";
> + ti,nand-xfer-type = "polled";
>
> gpmc,sync-clk = <0>;
> gpmc,cs-on = <0>;
> diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-
> omap2/gpmc.c
> index 410e1ba..2f47f76 100644
> --- a/arch/arm/mach-omap2/gpmc.c
> +++ b/arch/arm/mach-omap2/gpmc.c
> @@ -1212,6 +1212,13 @@ static const char * const nand_ecc_opts[] = {
> [OMAP_ECC_BCH8_CODE_HW] = "bch8",
> };
>
> +static const char * const nand_xfer_types[] = {
> + [NAND_OMAP_PREFETCH_POLLED] = "prefetch-
> polled",
> + [NAND_OMAP_POLLED] = "polled",
> + [NAND_OMAP_PREFETCH_DMA] = "prefetch-
> dma",
> + [NAND_OMAP_PREFETCH_IRQ] = "prefetch-irq",
> +};
> +
> static int gpmc_probe_nand_child(struct platform_device *pdev,
> struct device_node *child)
> {
> @@ -1241,6 +1248,13 @@ static int gpmc_probe_nand_child(struct
> platform_device *pdev,
> break;
> }
>
> + if (!of_property_read_string(child, "ti,nand-xfer-type", &s))
> + for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++)
> + if (!strcasecmp(s, nand_xfer_types[val])) {
> + gpmc_nand_data->xfer_type = val;
> + break;
> + }
> +
> val = of_get_nand_bus_width(child);
> if (val == 16)
> gpmc_nand_data->devsize = NAND_BUSWIDTH_16;
> --
> 1.7.9.5
> --
^ permalink raw reply [flat|nested] 2+ messages in thread
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