From mboxrd@z Thu Jan  1 00:00:00 1970
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
Subject: Re: Query on pinctrl usage for DT nodes
Date: Tue, 23 Apr 2013 09:42:51 +0200
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To: Tony Lindgren <tony@atomide.com>
Cc: Stephen Warren <swarren@nvidia.com>, Stephen Warren <swarren@wwwdotorg.org>, device-tree <devicetree-discuss@lists.ozlabs.org>, Prabhakar Lad <prabhakar.csengg@gmail.com>, linus.walleij@linaro.org, LAK <linux-arm-kernel@lists.infradead.org>
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On 04/16/2013 11:32 PM, Tony Lindgren wrote:
> * Peter Ujfalusi <peter.ujfalusi@ti.com> [130415 01:30]:
>> On 04/10/2013 10:34 PM, Tony Lindgren wrote:
>>> Yeah how about just change the pintctrl-single,bits register
>>> naming to be register + bit?  Something like 0xdeadbeef.0 and
>>> 0xdeadbeef.1 and so on.
>>
>> Something like this might work I think. It is going to be a bit tricky I=
MHO
>> since we might need span out new 'register' every time a device requests=
 for a
>> new pinctrl-single,bits for already used register in the
>> pinctrl-single,bit-per-mux area. In this way we still can make sure that
>> certain bit are only used by a single driver.
> =

> OK. If it's one bit per mux type register we should be able to create
> the right amount of entries based on the submask in pinctrs-single,bit?

Right now it seams to be true that we have one bit per mux (in DEVCONF0 on
OMAP3 for example). So that would work fine, but There could be different
registers around with more than one bit per mux.

Another way to deal with this is to:
in case of pinctrl-single,bit-per-mux we assume one bit per mux and create
entries based on the pinctrl-single,function-mask's bits.

In case we have more than one bit for the mux in the register we could have
optional property stating the number of different muxes handled by the regi=
ster.

One bit per mux type:

control_devconf0: pinmux@48002274 {
        compatible =3D "pinctrl-single";
        reg =3D <0x48002274 4>;   /* Single register */
        #address-cells =3D <1>;
        #size-cells =3D <0>;
        pinctrl-single,bit-per-mux;
        pinctrl-single,register-width =3D <32>;
        pinctrl-single,function-mask =3D <0x5F>;
};

Results six entries.

control_devconf0: pinmux@48002274 {
        compatible =3D "pinctrl-single";
        reg =3D <0x48002274 4>;   /* Single register */
        #address-cells =3D <1>;
        #size-cells =3D <0>;
        pinctrl-single,bit-per-mux;
        pinctrl-single,functions-in-register =3D <3>;
        pinctrl-single,register-width =3D <32>;
        pinctrl-single,function-mask =3D <0x5F>;
};

Will results three entries.

In both cases we still need to test overlaps in the handled bits.

-- =

P=E9ter