From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
Russell King - ARM Linux <linux@arm.linux.org.uk>,
Grant Likely <grant.likely@linaro.org>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>, Arnd Bergmann <arnd@arndb.de>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Gregory Clement <gregory.clement@free-electrons.com>,
Ezequiel Garcia <ezequiel.garcia@free-electrons.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Jean-Francois Moine <moinejf@free.fr>,
Gerlando Falauto <gerlando.falauto@keymile.com>,
devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC patch 7/8] genirq: generic chip: Add linear irq domain support
Date: Sat, 04 May 2013 04:30:28 +0200 [thread overview]
Message-ID: <518472C4.5080209@gmail.com> (raw)
In-Reply-To: <20130503214629.810207749@linutronix.de>
On 05/03/2013 11:50 PM, Thomas Gleixner wrote:
> Provide infrastructure for irq chip implementations which work on
> linear irq domains.
Thomas,
I am happy that I put you into rant mode. It took me little more
than an hour to read through your patches, prepare orion irqchip
driver on top of them and finally got it working.
Anyway, I found some more issues.
> Index: linux-2.6/kernel/irq/generic-chip.c
> ===================================================================
> --- linux-2.6.orig/kernel/irq/generic-chip.c
> +++ linux-2.6/kernel/irq/generic-chip.c
> @@ -7,6 +7,7 @@
[...]
> +int irq_alloc_domain_generic_chips(struct irq_domain *d, int
irqs_per_chip,
> + int num_ct, const char *name,
> + irq_flow_handler_t handler,
> + unsigned int clr, unsigned int set,
> + enum irq_gc_flags gcflags)
> +{
> + struct irq_domain_chip_generic *dgc;
> + struct irq_chip_generic *gc;
> + int numchips, sz, i;
> + unsigned long flags;
> +
> + if (d->gc)
> + return -EBUSY;
> +
> + if (d->revmap_type != IRQ_DOMAIN_MAP_LINEAR)
> + return -EINVAL;
> +
> + numchips = d->revmap_data.linear.size / irqs_per_chip;
> + if (!numchips)
> + return -EINVAL;
> +
> + sz = sizeof(*gc) + num_ct * sizeof(struct irq_chip_type);
> + sz *= numchips;
> + sz += sizeof(*dgc);
> +
> + dgc = kzalloc(sz, GFP_KERNEL);
> + if (!dgc)
> + return -ENOMEM;
> + dgc->irqs_per_chip = irqs_per_chip;
> + dgc->num_chips = numchips;
> + dgc->irq_flags_to_set = set;
> + dgc->irq_flags_to_clear = clr;
> + dgc->gc_flags = gcflags;
> + gc = dgc->gc;
> +
> + for (i = 0; i < numchips; i++, gc++) {
The memory you allocated for gc, num_ct * ct, and dgc doesn't allow
to increment through gc. gc is struct irq_chip_generic * but next
gc is at sizeof(*gc) + num_ct * sizeof(struct irq_chip_type).
This also affects indexing dgc->gc later.
I chose to fix it by having an index helper but that first maps
dgc-gc to unsigned char * and then adds the correct offset. Not
nice but it works. Maybe having real array of ptr to gc is more
intuitive here even if we will have to have split kzallocs.
> + irq_init_generic_chip(gc, name, num_ct, i * irqs_per_chip,
> + NULL, handler);
irq_init_generic_chip does not take care of initalizing ct
mask_cache ptr. This should be done here.
> + gc->domain = d;
> + raw_spin_lock_irqsave(&gc_lock, flags);
> + list_add_tail(&gc->list, &gc_list);
> + raw_spin_unlock_irqrestore(&gc_lock, flags);
> + }
> + d->gc = dgc;
Moving this assignment above the for loop allows to get
gc by index as indexing helper relies on domain, not domain
generic chip.
You want me to prepare patches for the above? Maybe you can
split your RFC into 1-6 and 7-8. Then you can have 1-6 applied
independently of irq_domain_generic_chip stuff.
Thanks for the RFC again!
Sebastian
next prev parent reply other threads:[~2013-05-04 2:30 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-02 18:25 [PATCH] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
[not found] ` <1367519104-19677-1-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-02 18:33 ` Sebastian Hesselbarth
2013-05-02 18:45 ` Russell King - ARM Linux
2013-05-02 18:54 ` Sebastian Hesselbarth
2013-05-02 18:56 ` Russell King - ARM Linux
2013-05-02 19:04 ` Sebastian Hesselbarth
2013-05-02 18:53 ` Jason Gunthorpe
2013-05-02 19:05 ` Sebastian Hesselbarth
2013-05-02 19:35 ` Jason Gunthorpe
2013-05-02 19:48 ` Sebastian Hesselbarth
2013-05-02 20:02 ` Andrew Lunn
2013-05-02 20:08 ` Gregory CLEMENT
[not found] ` <5182C322.3030304-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-04 17:58 ` Jason Cooper
2013-05-02 19:11 ` Arnd Bergmann
2013-05-02 19:34 ` Sebastian Hesselbarth
2013-05-02 19:37 ` Jason Gunthorpe
2013-05-02 19:39 ` Sebastian Hesselbarth
2013-05-02 19:22 ` Jason Cooper
2013-05-02 23:48 ` [PATCH v2 0/5] ARM: orion: add orion irqchip driver Sebastian Hesselbarth
[not found] ` <1367538519-23940-1-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-02 23:48 ` [PATCH v2 1/5] irqchip: add support for Marvell Orion SoCs Sebastian Hesselbarth
2013-05-03 12:55 ` Russell King - ARM Linux
2013-05-03 13:13 ` Sebastian Hesselbarth
2013-05-03 14:09 ` Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 0/8] genirq: Support for irq domains in generic irq chip Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
[not found] ` <20130503214629.397359626-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2013-05-27 13:38 ` Grant Likely
2013-05-03 21:50 ` [RFC patch 2/8] genirq: generic chip: Add support for per chip type mask cache Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-03 22:24 ` Russell King - ARM Linux
2013-05-03 22:39 ` Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-27 13:45 ` Grant Likely
2013-05-03 21:50 ` [RFC patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-03 22:23 ` Russell King - ARM Linux
2013-05-03 22:38 ` Thomas Gleixner
2013-05-04 2:30 ` Sebastian Hesselbarth [this message]
2013-05-04 8:04 ` Thomas Gleixner
2013-05-06 12:32 ` [RFC patch 7/8] fixup 1/2: " Sebastian Hesselbarth
2013-05-06 12:32 ` [RFC patch 7/8] fixup 2/2: " Sebastian Hesselbarth
2013-05-06 13:31 ` Thomas Gleixner
2013-05-06 13:25 ` [RFC patch 7/8] fixup 1/2: " Thomas Gleixner
2013-05-03 21:50 ` [RFC patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-04 2:37 ` Sebastian Hesselbarth
2013-05-06 9:48 ` [RFC patch 0/8] genirq: Support for irq domains in " Uwe Kleine-König
[not found] ` <20130503212258.385818955-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
2013-05-06 14:30 ` [patch 0/8] genirq: Support for irq domains in generic irq chip - V2 Thomas Gleixner
2013-05-06 14:30 ` [patch 1/8] genirq: generic chip: Remove the local cur_regs() function Thomas Gleixner
2013-05-06 14:30 ` [patch 2/8] genirq: generic chip: Add support for per chip type mask cache Thomas Gleixner
2013-05-06 14:30 ` [patch 3/8] genirq: generic chip: Handle separate mask registers Thomas Gleixner
2013-05-06 14:30 ` [patch 4/8] genirq: generic chip: Cache per irq bit mask Thomas Gleixner
2013-05-06 14:30 ` [patch 5/8] genirq: Add a mask calculation function Thomas Gleixner
2013-05-06 14:30 ` [patch 6/8] genirq: Split out code in generic chip Thomas Gleixner
2013-05-06 14:30 ` [patch 7/8] genirq: generic chip: Add linear irq domain support Thomas Gleixner
2013-05-29 2:22 ` Grant Likely
2013-05-29 8:23 ` Thomas Gleixner
2013-05-06 14:30 ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Thomas Gleixner
2013-05-06 15:18 ` Rob Herring
2013-05-12 14:05 ` [PATCH] irq-sun4i: Fix trivial build errors Maxime Ripard
2013-05-12 14:08 ` [patch 8/8] irqchip: sun4i: Convert to generic irq chip Maxime Ripard
2013-05-12 14:14 ` Maxime Ripard
2013-05-02 23:48 ` [PATCH v2 2/5] ARM: dove: add DT parsing for legacy mv643xx_eth Sebastian Hesselbarth
[not found] ` <1367538519-23940-3-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-03 5:06 ` Andrew Lunn
2013-05-03 9:58 ` Sebastian Hesselbarth
[not found] ` <20130503050632.GC24965-g2DYL2Zd6BY@public.gmane.org>
2013-05-04 18:29 ` Jason Cooper
[not found] ` <20130504182935.GO31290-u4khhh1J0LxI1Ri9qeTfzeTW4wlIGRCZ@public.gmane.org>
2013-05-04 19:37 ` Florian Fainelli
2013-05-02 23:48 ` [PATCH v2 3/5] ARM: dove: add DT parsing for legacy timer Sebastian Hesselbarth
2013-05-02 23:48 ` [PATCH v2 4/5] ARM: dove: move DT boards to orion irqchip driver Sebastian Hesselbarth
2013-05-02 23:48 ` [PATCH v2 5/5] ARM: dove: add DT nodes for irqchip conversion Sebastian Hesselbarth
2013-05-02 21:34 ` [PATCH] irqchip: add support for Marvell Orion SoCs Thomas Gleixner
2013-05-02 21:56 ` Sebastian Hesselbarth
2013-05-02 22:09 ` Arnd Bergmann
2013-05-02 22:37 ` Sebastian Hesselbarth
[not found] ` <5182EAA0.9070208-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2013-05-04 18:12 ` Jason Cooper
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