From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH 1/2] dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe controller Date: Mon, 28 Mar 2016 23:18:02 +0200 Message-ID: <5192758.5yjNn0Uus9@wuerfel> References: <1459071058-18328-1-git-send-email-thomas.petazzoni@free-electrons.com> <1459071058-18328-2-git-send-email-thomas.petazzoni@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <1459071058-18328-2-git-send-email-thomas.petazzoni@free-electrons.com> Sender: linux-pci-owner@vger.kernel.org To: linux-arm-kernel@lists.infradead.org Cc: Thomas Petazzoni , Bjorn Helgaas , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , Lior Amsalem , Andrew Lunn , Yehuda Yitschak , Jason Cooper , Hanna Hawa , Nadav Haklai , Gregory Clement , Sebastian Hesselbarth List-Id: devicetree@vger.kernel.org On Sunday 27 March 2016 11:30:57 Thomas Petazzoni wrote: > + ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */ > + 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */ > No 64-bit (prefetchable) MMIO area? Is this a hardware limitation, or did you just forget to add it? Arnd