From: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
To: "Chaiken,
Alison" <Alison_Chaiken-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
Cc: "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org"
<devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
Subject: Re: [PATCH 4/6] ARM: dts: imx6q: add pinctrl for WEIM NOR
Date: Wed, 22 May 2013 16:12:00 +0800 [thread overview]
Message-ID: <519C7DD0.6050807@freescale.com> (raw)
In-Reply-To: <60BA5429A0E1584BA3633194F6F993B50252C8D8-0dz9ie/QGrnnlEkxMdpx1dQH9K4/4qFeAL8bYrjMMd8@public.gmane.org>
于 2013年05月22日 00:16, Chaiken, Alison 写道:
>> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
>> index ed11bcf..e6174c7 100644
>> --- a/arch/arm/boot/dts/imx6q.dtsi
>> +++ b/arch/arm/boot/dts/imx6q.dtsi
>> @@ -323,6 +323,64 @@
>> >;
>> };
>> };
>> +
>> + weim {
>> + pinctrl_weim_nor_1: weim_norgrp-1 {
>> + fsl,pins =<
>> + MX6Q_PAD_EIM_OE__EIM_OE_B 0x10
>> + MX6Q_PAD_EIM_RW__EIM_RW 0x10
>> + MX6Q_PAD_EIM_CS0__EIM_CS0_B 0x10
>> + MX6Q_PAD_EIM_LBA__EIM_LBA_B 0x10
>> + MX6Q_PAD_EIM_WAIT__EIM_WAIT_B 0x8000
>> + MX6Q_PAD_EIM_BCLK__EIM_BCLK 0x8000
> The following values are derived using Table 4-1 of "i.MX 6Dual/6Quad Applications Processor Reference Manual Document Number: IMX6DQRM Rev. 1, 04/2013":
>
> MX6Q_PAD_EIM_OE__WEIM_WEIM_OE 0xb0b1
> MX6Q_PAD_EIM_RW__WEIM_WEIM_RW 0xb0b1
> MX6Q_PAD_EIM_CS0__WEIM_WEIM_CS_0 0xb0b1
> MX6Q_PAD_EIM_WAIT__WEIM_WEIM_WAIT 0xb060
>
> (I wrote a short C program that parses a human-readable property table for the pins and spits out hex to generate them.) How are 0x10 values calculated? Are settings
0x10 is from our legacy bsp code.
I think the 0xb0b1 is ok too.
> for MX6Q_PAD_EIM_LBA__EIM_LBA_B and MX6Q_PAD_EIM_BCLK__EIM_BCLK useful? We run NOR without them.
yes. we may remove them.
>> + MX6Q_PAD_EIM_A17__EIM_ADDR17 0xb0b1
>> + MX6Q_PAD_EIM_A16__EIM_ADDR16 0xb0b1
>> + MX6Q_PAD_EIM_DA15__EIM_AD15 0xb0b1
>> + MX6Q_PAD_EIM_DA14__EIM_AD14 0xb0b1
>> + MX6Q_PAD_EIM_DA13__EIM_AD13 0xb0b1
> Are these names correct? "MX6Q_PAD_EIM_A16__EIM_ADDR16" but "MX6Q_PAD_EIM_DA15__EIM_AD15" et cetera?
>
I think it's correct.
We do not have the MX6Q_PAD_EIM_DA16__EIM_AD16.
thanks
Huang Shijie
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next prev parent reply other threads:[~2013-05-22 8:12 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-21 16:16 [PATCH 4/6] ARM: dts: imx6q: add pinctrl for WEIM NOR Chaiken, Alison
[not found] ` <60BA5429A0E1584BA3633194F6F993B50252C8D8-0dz9ie/QGrnnlEkxMdpx1dQH9K4/4qFeAL8bYrjMMd8@public.gmane.org>
2013-05-22 8:12 ` Huang Shijie [this message]
2013-05-23 5:43 ` Huang Shijie
-- strict thread matches above, loose matches on Subject: below --
2013-05-20 8:48 [PATCH 0/6] ARM: imx6q{dl}: add the WEIM driver Huang Shijie
2013-05-20 8:49 ` [PATCH 4/6] ARM: dts: imx6q: add pinctrl for WEIM NOR Huang Shijie
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