Re: microblaze device-tree description - pair intc/buses and timers

[Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>]

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On 06/12/2013 11:16 AM, Grant Likely wrote:
> On Wed, Jun 12, 2013 at 7:30 AM, Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org> wrote:
>> On 06/12/2013 12:22 AM, Grant Likely wrote:
>>> On Tue, 11 Jun 2013 16:08:11 +0200, Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org> wrote:
>>> It would mean every device driver needs to be polled. As long as the
>>> polling frequency is high enough for the work load then it should be
>>> okay. I don't see a problem with there being no interrupt controller,
>>> unless there needs to be a dummy one just to keep the kernel happy.
>>
>> Interesting. I have tried to compile the fragment below by dtc
>> and there is no warning. It also means that there is missing checking
>> in DTC for interrupt-cells.
>>
>> What I am worried about is that request_irq in the driver will require
>> irq chip functions which there are not.
> 
> A driver cannot call request_irq if it doesn't have an irq number to
> call it with, and it won't have an IRQ number if there is no irq
> specifier in the DT, so you should be fine in that regard.

That's correct but in my example there was interrupt listed and connected
because it also says that interrupt is enabled directly on the IP.

I have also started to think how to properly describe clocksource
driver because it is also uniq in the system because all cpus
should have access to this IP.
It means that not every timer could be possible to use for this purpose.
What we have for single microblaze and multi cpu system is just extension
of this is that we are using special name for this clocksource timer
which is called system-timer.
Do you think that this rule is fine or any additional description should
be made?

Clockevent is easy because the first suitable timer can be used for it
or the most accurate one.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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