[PATCH 0/4] dra7: I2C/MCSPI/UART pin control datas

[PATCH 0/4] dra7: I2C/MCSPI/UART pin control datas

[Sourav Poddar]

These series add support for I2C/MCSPI/UART pin control datas.

The series is done on top of Rajendra Nayak series[1](posted to the list), 
which has basic dt boot enable for dra7.
These patches has been tested, along with I2C and UART patches from
wolfram sang patch series[2]. 


[1]: http://www.spinics.net/lists/linux-omap/msg93535.html
[2]: https://lkml.org/lkml/2013/7/10/335

Sourav Poddar (4):
  arm: dts: omap5-evm: Add I2c pinctrl data
  arm: dts: omap5-evm: Add I2c pinctrl data
  arm: dts: dra7-evm: Add SPI pinctrl data
  arm: dts: dra7-evm: Add UART pinctrl data

 arch/arm/boot/dts/dra7-evm.dts |  123 ++++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/dra7.dtsi    |   15 +++++
 2 files changed, 138 insertions(+), 0 deletions(-)

[PATCH 1/4] arm: dts: dra7: Add initial status for the devices.

[Sourav Poddar]

This patch disabled I2C/SPI/UART device initially(status = "disabled").
This devices will only be probed, if the devices are 
present in the dts file(status = "okay").

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a5d9350..40e450b 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -206,6 +206,7 @@
 			interrupts = <0 72 0x4>;
 			ti,hwmods = "uart1";
 			clock-frequency = <48000000>;
+                        status = "disabled";
 		};
 
 		uart2: serial@4806c000 {
@@ -214,6 +215,7 @@
 			interrupts = <0 73 0x4>;
 			ti,hwmods = "uart2";
 			clock-frequency = <48000000>;
+                        status = "disabled";
 		};
 
 		uart3: serial@48020000 {
@@ -222,6 +224,7 @@
 			interrupts = <0 74 0x4>;
 			ti,hwmods = "uart3";
 			clock-frequency = <48000000>;
+                        status = "disabled";
 		};
 
 		uart4: serial@4806e000 {
@@ -230,6 +233,7 @@
 			interrupts = <0 70 0x4>;
 			ti,hwmods = "uart4";
 			clock-frequency = <48000000>;
+                        status = "disabled";
 		};
 
 		uart5: serial@48066000 {
@@ -238,6 +242,7 @@
 			interrupts = <0 105 0x4>;
 			ti,hwmods = "uart5";
 			clock-frequency = <48000000>;
+                        status = "disabled";
 		};
 
 		uart6: serial@48068000 {
@@ -246,6 +251,7 @@
 			interrupts = <0 106 0x4>;
 			ti,hwmods = "uart6";
 			clock-frequency = <48000000>;
+                        status = "disabled";
 		};
 
 		timer1: timer@4ae18000 {
@@ -354,6 +360,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c1";
+                        status = "disabled";
 		};
 
 		i2c2: i2c@48072000 {
@@ -363,6 +370,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c2";
+                        status = "disabled";
 		};
 
 		i2c3: i2c@48060000 {
@@ -372,6 +380,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c3";
+                        status = "disabled";
 		};
 
 		i2c4: i2c@4807a000 {
@@ -381,6 +390,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c4";
+                        status = "disabled";
 		};
 
 		i2c5: i2c@4807c000 {
@@ -390,6 +400,7 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			ti,hwmods = "i2c5";
+                        status = "disabled";
 		};
 
 		mmc1: mmc@4809c000 {
@@ -451,6 +462,7 @@
 			       <&sdma 42>;
 			dma-names = "tx0", "rx0", "tx1", "rx1",
 				    "tx2", "rx2", "tx3", "rx3";
+                        status = "disabled";
 		};
 
 		mcspi2: spi@4809a000 {
@@ -466,6 +478,7 @@
 			       <&sdma 45>,
 			       <&sdma 46>;
 			dma-names = "tx0", "rx0", "tx1", "rx1";
+                        status = "disabled";
 		};
 
 		mcspi3: spi@480b8000 {
@@ -478,6 +491,7 @@
 			ti,spi-num-cs = <2>;
 			dmas = <&sdma 15>, <&sdma 16>;
 			dma-names = "tx0", "rx0";
+                        status = "disabled";
 		};
 
 		mcspi4: spi@480ba000 {
@@ -490,6 +504,7 @@
 			ti,spi-num-cs = <1>;
 			dmas = <&sdma 70>, <&sdma 71>;
 			dma-names = "tx0", "rx0";
+                        status = "disabled";
 		};
 	};
 };
-- 
1.7.1

[PATCH 2/4] arm: dts: dra7-evm: Add I2C pinctrl data

[Sourav Poddar]

Add pin control data for i2c1, i2c2 and i2c3.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts |   47 ++++++++++++++++++++++++++++++++++++++++
 1 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 9c568b6..5591db2 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -18,3 +18,50 @@
 		reg = <0x80000000 0x20000000>; /* 512 MB */
 	};
 };
+
+&dra7_pmx_core {
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			0x400 0x60000	/* i2c1_sda */
+			0x404 0x60000	/* i2c1_scl */
+		>;
+	};
+
+	i2c2_pins: pinmux_i2c2_pins {
+		pinctrl-single,pins = <
+			0x408 0x60000	/* i2c2_sda */
+			0x40c 0x60000	/* i2c2_scl */
+		>;
+	};
+
+	i2c3_pins: pinmux_i2c3_pins {
+		pinctrl-single,pins = <
+			0x410 0x60000	/* i2c3_sda */
+			0x414 0x60000	/* i2c3_scl */
+		>;
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
+
+	clock-frequency = <400000>;
+};
+
+&i2c2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_pins>;
+
+	clock-frequency = <400000>;
+};
+
+&i2c3 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c3_pins>;
+
+	clock-frequency = <3400000>;
+};
-- 
1.7.1

[PATCH 3/4] arm: dts: dra7-evm: Add SPI pinctrl data

[Sourav Poddar]

Add pin control data for mcspi1 and mcspi2.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts |   33 +++++++++++++++++++++++++++++++++
 1 files changed, 33 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5591db2..d8b0da9 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -40,6 +40,27 @@
 			0x414 0x60000	/* i2c3_scl */
 		>;
 	};
+
+	mcspi1_pins: pinmux_mcspi1_pins {
+		pinctrl-single,pins = <
+			0x3a4 0x40000	/* spi2_clk */
+			0x3a8 0x40000	/* spi2_d1 */
+			0x3ac 0x40000	/* spi2_d0 */
+			0x3b0 0xc0000	/* spi2_cs0 */
+			0x3b4 0xc0000	/* spi2_cs1 */
+			0x3b8 0xe0006	/* spi2_cs2 */
+			0x3bc 0xe0006	/* spi2_cs3 */
+		>;
+	};
+
+	mcspi2_pins: pinmux_mcspi2_pins {
+		pinctrl-single,pins = <
+			0x3c0 0x40000	/* spi2_sclk */
+			0x3c4 0xc0000	/* spi2_d1 */
+			0x3c8 0xc0000	/* spi2_d1 */
+			0x3cc 0xe0000	/* spi2_cs0 */
+		>;
+	};
 };
 
 &i2c1 {
@@ -65,3 +86,15 @@
 
 	clock-frequency = <3400000>;
 };
+
+&mcspi1 {
+        status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcspi1_pins>;
+};
+
+&mcspi2 {
+        status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcspi2_pins>;
+};
-- 
1.7.1

[PATCH 4/4] arm: dts: dra7-evm: Add UART pinctrl data

[Sourav Poddar]

Add pin control datas for uart1, uart2 and uart3.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
---
 arch/arm/boot/dts/dra7-evm.dts |   43 ++++++++++++++++++++++++++++++++++++++++
 1 files changed, 43 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index d8b0da9..8f3be53 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -61,6 +61,31 @@
 			0x3cc 0xe0000	/* spi2_cs0 */
 		>;
 	};
+
+	uart1_pins: pinmux_uart1_pins {
+		pinctrl-single,pins = <
+			0x3e0 0xe0000	/* uart1_rxd */
+			0x3e4 0xe0000	/* uart1_txd */
+			0x3e8 0x60003	/* uart1_ctsn */
+			0x3ec 0x60003	/* uart1_rtsn */
+		>;
+	};
+
+	uart2_pins: pinmux_uart2_pins {
+		pinctrl-single,pins = <
+			0x3f0 0x60000 /* uart2_rxd */
+			0x3f4 0x60000 /* uart2_txd */
+			0x3f8 0x60000 /* uart2_ctsn */
+			0x3fc 0x60000 /* uart2_rtsn */
+		>;
+	};
+
+	uart3_pins: pinmux_uart3_pins {
+		pinctrl-single,pins = <
+			0x248 0xc0000 /* uart3_rxd */
+			0x24c 0xc0000 /* uart3_txd */
+		>;
+	};
 };
 
 &i2c1 {
@@ -98,3 +123,21 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mcspi2_pins>;
 };
+
+&uart1 {
+	status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart1_pins>;
+};
+
+&uart2 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart2_pins>;
+};
+
+&uart3 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&uart3_pins>;
+};
-- 
1.7.1

Re: [PATCH 0/4] dra7: I2C/MCSPI/UART pin control datas

[Nishanth Menon]

On 07/19/2013 11:24 AM, Sourav Poddar wrote:
> These series add support for I2C/MCSPI/UART pin control datas.
>
> The series is done on top of Rajendra Nayak series[1](posted to the list),
> which has basic dt boot enable for dra7.
> These patches has been tested, along with I2C and UART patches from
> wolfram sang patch series[2].
>
>
> [1]: http://www.spinics.net/lists/linux-omap/msg93535.html
> [2]: https://lkml.org/lkml/2013/7/10/335
>
> Sourav Poddar (4):
>    arm: dts: omap5-evm: Add I2c pinctrl data
>    arm: dts: omap5-evm: Add I2c pinctrl data
>    arm: dts: dra7-evm: Add SPI pinctrl data
>    arm: dts: dra7-evm: Add UART pinctrl data
>
>   arch/arm/boot/dts/dra7-evm.dts |  123 ++++++++++++++++++++++++++++++++++++++++
>   arch/arm/boot/dts/dra7.dtsi    |   15 +++++
>   2 files changed, 138 insertions(+), 0 deletions(-)
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>
DRA7 DTS is not merged yet, If I am not mistaken.
Ref[1] [2]
So why not squash these to [2]?

[1] http://marc.info/?t=137335517900001&r=1&w=2
[2] http://marc.info/?l=linux-arm-kernel&m=137335590702349&w=2


-- 
Regards,
Nishanth Menon

Re: [PATCH 1/4] arm: dts: dra7: Add initial status for the devices.

[Stephen Warren]

On 07/19/2013 10:24 AM, Sourav Poddar wrote:
> This patch disabled I2C/SPI/UART device initially(status = "disabled").
> This devices will only be probed, if the devices are 
> present in the dts file(status = "okay").

>  			interrupts = <0 72 0x4>;
>  			ti,hwmods = "uart1";
>  			clock-frequency = <48000000>;

Those lines (and I assume the whole file) is indented with TABs.

> +                        status = "disabled";

Whereas all the new lines use spaces.

Re: [PATCH 0/4] dra7: I2C/MCSPI/UART pin control datas

[Sourav Poddar]

On Friday 19 July 2013 10:01 PM, Nishanth Menon wrote:
> On 07/19/2013 11:24 AM, Sourav Poddar wrote:
>> These series add support for I2C/MCSPI/UART pin control datas.
>>
>> The series is done on top of Rajendra Nayak series[1](posted to the 
>> list),
>> which has basic dt boot enable for dra7.
>> These patches has been tested, along with I2C and UART patches from
>> wolfram sang patch series[2].
>>
>>
>> [1]: http://www.spinics.net/lists/linux-omap/msg93535.html
>> [2]: https://lkml.org/lkml/2013/7/10/335
>>
>> Sourav Poddar (4):
>>    arm: dts: omap5-evm: Add I2c pinctrl data
>>    arm: dts: omap5-evm: Add I2c pinctrl data
>>    arm: dts: dra7-evm: Add SPI pinctrl data
>>    arm: dts: dra7-evm: Add UART pinctrl data
>>
>>   arch/arm/boot/dts/dra7-evm.dts |  123 
>> ++++++++++++++++++++++++++++++++++++++++
>>   arch/arm/boot/dts/dra7.dtsi    |   15 +++++
>>   2 files changed, 138 insertions(+), 0 deletions(-)
>>
>> -- 
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html
>>
> DRA7 DTS is not merged yet, If I am not mistaken.
> Ref[1] [2]
> So why not squash these to [2]?
>
> [1] http://marc.info/?t=137335517900001&r=1&w=2
> [2] http://marc.info/?l=linux-arm-kernel&m=137335590702349&w=2
>
>
Yes, its not merged.
We can squash these series.