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From: Rob Herring <robherring2@gmail.com>
To: Mark Langsdorf <mark.langsdorf@calxeda.com>
Cc: linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
	tj@kernel.org, devicetree@vger.kernel.org, pawel.moll@arm.com,
	mark.rutland@arm.com, swarren@wwwdotorg.org,
	ian.campbell@citrix.com
Subject: Re: [PATCH 3/5] devicetree: create a separate binding description for sata_highbank
Date: Fri, 26 Jul 2013 10:45:14 -0500	[thread overview]
Message-ID: <51F2998A.7070304@gmail.com> (raw)
In-Reply-To: <1374851518-4802-3-git-send-email-mark.langsdorf@calxeda.com>

On 07/26/2013 10:11 AM, Mark Langsdorf wrote:
> The Calxeda sata_highbank driver has been adding its descriptions to the
> ahci driver. Separate them properly.
>
> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>

Acked-by: Rob Herring <rob.herring@calxeda.com>

Rob

> ---
>  .../devicetree/bindings/ata/ahci-platform.txt      | 14 ++--------
>  .../devicetree/bindings/ata/sata_highbank.txt      | 32 ++++++++++++++++++++++
>  2 files changed, 34 insertions(+), 12 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/ata/sata_highbank.txt
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> index 3ec0c5c..14d7b22 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> @@ -4,27 +4,17 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
>  Each SATA controller should have its own node.
>  
>  Required properties:
> -- compatible        : compatible list, contains "calxeda,hb-ahci" or "snps,spear-ahci"
> +- compatible        : compatible list, contains "snps,spear-ahci"
>  - interrupts        : <interrupt mapping for SATA IRQ>
>  - reg               : <registers mapping>
>  
>  Optional properties:
> -- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
> -			SATA port to a combophy and a lane within that
> -			combophy
> -- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
> -			which indicates that the driver supports SGPIO
> -			indicator lights using the indicated GPIOs
> -- calxeda,led-order : a u32 array that map port numbers to offsets within the
> -			SGPIO bitstream.
>  - dma-coherent      : Present if dma operations are coherent
>  
>  Example:
>          sata@ffe08000 {
> -		compatible = "calxeda,hb-ahci";
> +		compatible = "snps,spear-ahci";
>                  reg = <0xffe08000 0x1000>;
>                  interrupts = <115>;
> -		calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
> -					&combophy0 2 &combophy0 3>;
>  
>          };
> diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.txt b/Documentation/devicetree/bindings/ata/sata_highbank.txt
> new file mode 100644
> index 0000000..aa1b798
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ata/sata_highbank.txt
> @@ -0,0 +1,32 @@
> +* Calxeda AHCI SATA Controller
> +
> +SATA nodes are defined to describe on-chip Serial ATA controllers.
> +The Calxeda SATA controller mostly conforms to the AHCI interface
> +with some special extensions to add functionality.
> +Each SATA controller should have its own node.
> +
> +Required properties:
> +- compatible        : compatible list, contains "calxeda,hb-ahci"
> +- interrupts        : <interrupt mapping for SATA IRQ>
> +- reg               : <registers mapping>
> +
> +Optional properties:
> +- dma-coherent      : Present if dma operations are coherent
> +- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
> +			SATA port to a combophy and a lane within that
> +			combophy
> +- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
> +			which indicates that the driver supports SGPIO
> +			indicator lights using the indicated GPIOs
> +- calxeda,led-order : a u32 array that map port numbers to offsets within the
> +			SGPIO bitstream.
> +
> +Example:
> +        sata@ffe08000 {
> +		compatible = "calxeda,hb-ahci";
> +                reg = <0xffe08000 0x1000>;
> +                interrupts = <115>;
> +		calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
> +					&combophy0 2 &combophy0 3>;
> +
> +        };
> 

  reply	other threads:[~2013-07-26 15:45 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-07-26 15:11 [PATCH 1/5] sata, highbank: fix ordering of SGPIO signals Mark Langsdorf
2013-07-26 15:11 ` [PATCH 2/5] sata highbank: enable 64-bit DMA mask when using LPAE Mark Langsdorf
2013-07-26 15:11 ` [PATCH 3/5] devicetree: create a separate binding description for sata_highbank Mark Langsdorf
2013-07-26 15:45   ` Rob Herring [this message]
2013-07-26 15:11 ` [PATCH 4/5] sata, highbank: set tx_atten override bits Mark Langsdorf
2013-07-26 16:22   ` Mark Rutland
2013-07-26 18:38     ` Rob Herring
2013-07-30 16:42       ` Mark Rutland
2013-08-02 15:24         ` Mark Langsdorf
2013-07-26 15:11 ` [PATCH 5/5] sata, highbank: send extra clock cycles in SGPIO patterns Mark Langsdorf
2013-07-26 15:48   ` Rob Herring
2013-07-26 16:26   ` Mark Rutland
2013-07-26 18:34     ` Rob Herring
2013-07-29 16:55 ` [PATCH 1/5] sata, highbank: fix ordering of SGPIO signals Tejun Heo
2013-08-02 15:23   ` Mark Langsdorf
2013-08-02 19:29     ` Tejun Heo
2013-08-14 18:23 ` [PATCH v4 1/3] devicetree: create a separate binding description for sata_highbank Mark Langsdorf
2013-08-14 18:23   ` [PATCH v4 2/3] sata, highbank: set tx_atten override bits Mark Langsdorf
2013-08-14 18:23   ` [PATCH v4 3/3] sata, highbank: send extra clock cycles in SGPIO patterns Mark Langsdorf
2013-08-14 20:27   ` [PATCH v4 1/3] devicetree: create a separate binding description for sata_highbank Tejun Heo
2013-08-14 20:36     ` Mark Langsdorf
2013-08-14 20:37       ` Tejun Heo
2013-08-14 20:40 ` Mark Langsdorf
2013-08-14 20:44   ` Tejun Heo

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