From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from hqemgate14.nvidia.com ([216.228.121.143]:10225 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757587Ab3HMNNX (ORCPT ); Tue, 13 Aug 2013 09:13:23 -0400 Message-ID: <520A3467.20203@nvidia.com> Date: Tue, 13 Aug 2013 18:58:07 +0530 From: Laxman Dewangan MIME-Version: 1.0 Subject: Re: [PATCH V3 3/3] pinctrl: palmas: add pincontrol driver References: <1375794755-6246-1-git-send-email-ldewangan@nvidia.com> <1375794755-6246-4-git-send-email-ldewangan@nvidia.com> <5201467D.9020803@wwwdotorg.org> In-Reply-To: <5201467D.9020803@wwwdotorg.org> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org To: "linus.walleij@linaro.org" Cc: Stephen Warren , "ian.campbell@citrix.com" , "rob.herring@calxeda.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "rob@landley.net" , "sameo@linux.intel.com" , "lee.jones@linaro.org" , "grant.likely@linaro.org" , "broonie@kernel.org" , "devicetree@vger.kernel.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "gg@slimlogic.co.uk" , "kishon@ti.com" List-ID: Hi Linus, On Wednesday 07 August 2013 12:24 AM, Stephen Warren wrote: > On 08/06/2013 07:12 AM, Laxman Dewangan wrote: >> TI Palmas series Power Management IC have multiple pins which can be >> configured for different functionality. This pins can be configured >> for different function. Also their properties like pull up/down, >> open drain enable/disable are configurable. >> >> Add support for pincontrol driver Palmas series device like TPS65913, >> TPS80036. The driver supports to be register from DT only. > I think this binding is reasonable enough, so that part, > > Reviewed-by: Stephen Warren Can you please review this series? I have some follow on patches on cleanups of tegra pincontrol driver to use the utils function which is introduced on this series which I want to send. Thanks, Laxman