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From: Maxime COQUELIN <maxime.coquelin-qxv4g6HH51o@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>,
	Srinivas KANDAGATLA
	<srinivas.kandagatla-qxv4g6HH51o@public.gmane.org>,
	Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>,
	Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Ian Campbell
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	Rob Landley <rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org>,
	Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>,
	Grant Likely
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
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	<linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	Stephen GALLIMORE
	<stephen.gallimore-qxv4g6HH51o@public.gmane.org>,
	Stuart MENEFY <stuart.menefy-qxv4g6HH51o@public.gmane.org>,
	Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Gabriel FERNANDEZ
	<gabriel.fernandez-qxv4g6HH51o@public.gmane.org>,
	Olivier CLERGEAUD
	<olivier.clergeaud-qxv4g6HH51o@public.gmane.org>
Subject: Re: [PATCH 1/4] i2c: busses: i2c-st: Add ST I2C controller
Date: Tue, 24 Sep 2013 17:38:34 +0200	[thread overview]
Message-ID: <5241B1FA.6020500@st.com> (raw)
In-Reply-To: <5240AD6E.4090905-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>


On 09/23/2013 11:06 PM, Stephen Warren wrote:
> On 09/18/2013 04:01 AM, Maxime COQUELIN wrote:
>> This patch adds support to SSC (Synchronous Serial Controller)
>> I2C driver. This IP also supports SPI protocol, but this is not
>> the aim of this driver.
>>
>> This IP is embedded in all ST SoCs for Set-top box platorms, and
>> supports I2C Standard and Fast modes.
>> diff --git a/Documentation/devicetree/bindings/i2c/i2c-st.txt b/Documentation/devicetree/bindings/i2c/i2c-st.txt
>> +I2C for ST platforms
> If the HW block supports both I2C and SPI, the DT binding ought to
> support that too. It's be best to create a single DT binding that
> represents the IP block, and include a property that indicates whether
> the device should operate in I2C or SPI mode.
>
> I suppose you could reasonably define different compatible values for
> those two cases. However, the binding should be titled something more
> like "ST SSC binding, for I2C mode operation" and "ST SSC binding, for
> SPI mode operation", rather than "I2C for ST platforms", since the HW
> includes an SSC block, not an I2C block.
You are right Stephen.
I will rename the title and change the compatible value as per your 
recommendation.

>> +Required properties :
>> +- compatible : Must be "st,comms-i2c"
>> +- reg : Offset and length of the register set for the device
>> +- interrupts : the interrupt number
> It's an interrupt specifier, not an interrupt number. The format is
> defined by the interrupt controller, not this binding.
Ok. I will change to "the interrupt specifier".
>> +- clocks : phandle to the I2C clock source
> What about clock-names?
It will be added in next revision. It will be named "ssc"
>> +Recommended (non-standard) properties :
> Usually you'd just say "Optional properties:", or perhaps "Recommended
> properties:". I don't think adding "(non-standard)" serves any purpose.
Ok. then I will remove all the "non-standard" occurences.
>> +- clock-frequency : Desired I2C bus clock frequency in Hz. Otherwise
>> +  the default 100 kHz frequency will be used. As only Normal and Fast modes
>> +  are supported, possible values are 100000 and 400000.
>> +
>> +Optional (non-standard) properties:
> Same here.
>
>> +- st,glitches : Enable timing glitch suppression support.
> That property name doesn't really convey the "enables" that appears in
> the property description to me...
>
>> +- st,glitch-clk : SCL line timinig glitch suppression value in ns.
>> +- st,glitch-dat : SDA line timinig glitch suppression value in ns.
> s/timinig/timing/
>
>> +- st,hw-glitches : Enable filter glitch suppression support.
>> +- st,hw-glitch-clk : SCL line filter glitch suppression value in us.
>> +- st,hw-glitch-dat : SDA line filter glitch suppression value in us.
> Those sound more like runtime configuration rather than HW description.
> Can you rephrase the descriptions (and property names) more along the
> lines of HW properties? Perhaps e.g.:
>
> st,needs-glitch-suppression: The board design needs timing glitch
> suppression enabled to operate reliably.
>
> st,min-scl-pulse-width: The minimum valid SCL pulse width that is
> allowed through the deglitch circuit. In units of ns.
>
> (I just made up those descriptions to give a feel for the flavor of
> description that I expect. They likely need some adjustment to reflect
> whatever they're actually intended to represent in HW).
>
> What is the difference between "glitch" and "hw-glitch"?
"hw-glitch" is used to configure the anti-glitch filters.
It suppresses the pulses with a width lower than x microseconds.

"glitch" is is used to tune the I2C timing requirements, and has a 
nanosecond granularity.
These values are added to default timing values.
I'm not 100% sure, but it looks like the "samsung,i2c-sda-delay" in the 
i2c-s3c2410 driver.

I agree the names and descriptions are not clear, and even misleading.
I will come with a clearer implementation, as soon as I get 
clarification from HW team.

Thanks for the review,
Maxime

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  parent reply	other threads:[~2013-09-24 15:38 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-18 10:01 [PATCH 0/4] Add I2C support to ST SoCs Maxime COQUELIN
2013-09-18 10:01 ` [PATCH 1/4] i2c: busses: i2c-st: Add ST I2C controller Maxime COQUELIN
2013-09-18 12:47   ` Gabriel FERNANDEZ
     [not found]     ` <5239A0ED.6010606-qxv4g6HH51o@public.gmane.org>
2013-09-23 20:55       ` Stephen Warren
     [not found]   ` <1379498483-4236-2-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-09-23 21:06     ` Stephen Warren
     [not found]       ` <5240AD6E.4090905-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-09-24 15:38         ` Maxime COQUELIN [this message]
     [not found]           ` <5241B1FA.6020500-qxv4g6HH51o@public.gmane.org>
2013-09-24 15:59             ` Wolfram Sang
2013-09-26  9:30               ` Maxime COQUELIN
     [not found] ` <1379498483-4236-1-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-09-18 10:01   ` [PATCH 2/4] ARM: STi: Supply I2C configuration to STiH416 SoC Maxime COQUELIN
     [not found]     ` <1379498483-4236-3-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-09-18 12:03       ` Lee Jones
2013-09-18 12:46         ` Maxime COQUELIN
     [not found]           ` <84625B87D65BCF478CC1E9C886A4C314DEF1BD9578-+EwDPpWUVoSs+H57zxxw29BPR1lH4CV8@public.gmane.org>
2013-09-18 12:57             ` Srinivas KANDAGATLA
2013-09-19  7:16               ` Maxime COQUELIN
2013-09-19 12:59                 ` Srinivas KANDAGATLA
2013-09-19 15:22                   ` Maxime COQUELIN
     [not found]                     ` <84625B87D65BCF478CC1E9C886A4C314DEF1BD957D-+EwDPpWUVoSs+H57zxxw29BPR1lH4CV8@public.gmane.org>
2013-09-19 15:32                       ` Lee Jones
2013-09-18 10:01 ` [PATCH 3/4] ARM: STi: Supply I2C configuration to STiH415 SoC Maxime COQUELIN
2013-09-18 12:00   ` Lee Jones
2013-09-18 12:38     ` Maxime COQUELIN
2013-09-18 10:01 ` [PATCH 4/4] ARM: STi: Add I2C config to B2000 and B2020 boards Maxime COQUELIN
2013-09-18 11:40   ` Lee Jones
2013-09-18 12:36     ` Maxime COQUELIN
  -- strict thread matches above, loose matches on Subject: below --
2013-10-01 10:39 [PATCH v3 0/4] Add I2C support to ST SoCs Maxime COQUELIN
     [not found] ` <1380623952-4252-1-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-10-01 10:39   ` [PATCH 1/4] i2c: busses: i2c-st: Add ST I2C controller Maxime COQUELIN
     [not found]     ` <1380623952-4252-2-git-send-email-maxime.coquelin-qxv4g6HH51o@public.gmane.org>
2013-10-01 20:45       ` Stephen Warren
2013-10-02  8:36         ` Maxime COQUELIN
2013-10-02  9:02           ` Wolfram Sang
2013-10-02  9:35             ` Maxime COQUELIN
     [not found]               ` <524BE8FB.40000-qxv4g6HH51o@public.gmane.org>
2013-10-02 13:56                 ` Maxime COQUELIN

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