From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laxman Dewangan Subject: Re: [PATCH V3] clk: palmas: add clock driver for palmas Date: Wed, 9 Oct 2013 15:13:41 +0530 Message-ID: <5255254D.4090108@nvidia.com> References: <1381238480-18852-1-git-send-email-ldewangan@nvidia.com> <525408B3.1000107@ti.com> <5254193A.70104@nvidia.com> <20131008152812.GA4981@e106331-lin.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20131008152812.GA4981@e106331-lin.cambridge.arm.com> Sender: linux-doc-owner@vger.kernel.org To: Mark Rutland Cc: Nishanth Menon , "mturquette@linaro.org" , "devicetree@vger.kernel.org" , Stephen Warren , Pawel Moll , "ijc+devicetree@hellion.org.uk" , "broonie@linaro.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "rob.herring@calxeda.com" , "rob@landley.net" , "grant.likely@linaro.org" , "linux-arm-kernel@lists.infradead.org" , J Keerthy List-Id: devicetree@vger.kernel.org On Tuesday 08 October 2013 08:58 PM, Mark Rutland wrote: > On Tue, Oct 08, 2013 at 03:39:54PM +0100, Laxman Dewangan wrote: >> >>>> + >>>> + Optional subnode properties: >>>> + ti,clock-boot-enable: Enable clock at the time of booting. >>> Dumb question: Why is this needed? should'nt relevant drivers do a >>> clk_get to enable the relevant clocks? >> If some board needs this clock to be always available for rest of system >> to work without any specific driver then this flag is useful. > Do we _actually_ need this right now, or is this hypothetical? > > If we don't need it now, remove it. If you think we need it know, please > describe exactly why (i.e. what device needs the clock to work, why does > this affect the rest of the board if we don't ahve a driver for that > device, why don't we just write a driver for that device). > Ok, I will remove it. Going with nothing free of cost for the driver/system and client need to call the proper APIs. >> >>>> + ti,external-sleep-control: The clock is enable/disabled by state >>>> + of external enable input pins ENABLE, ENABLE2 and NSLEEP. >>>> + The valid value for the external pins are: >>>> + 1 for ENABLE1 >>>> + 2 for ENABLE2 >>>> + 3 for NSLEEP. > I asked this on the last version (before having noticed this one). What > actually drives those pins to control the clock(s)? > > Is this for setting the clock to be controlled by the external pin, or > is the clock hard-wired to a particular pin? > This is for setting the clock to be controlled by the external pin.